diff mbox series

[v4,08/18] EDAC/synopsys: Parse ADDRMAP[0] CSR for multi-ranks case only

Message ID 20230920192806.29960-9-fancer.lancer@gmail.com (mailing list archive)
State New, archived
Headers show
Series EDAC/synopsys: Add generic DDRC info and address mapping | expand

Commit Message

Serge Semin Sept. 20, 2023, 7:26 p.m. UTC 
The ADDRMAP[0] CSR contains the SDRAM Rank bits mapping (and memory
channel mapping but it's irrelevant in this case). Obviously they are
applicable for the multi-ranked memory only. If either the attached memory
isn't multi-ranked or the controller simply doesn't support the multi-rank
memory, parsing the ADDRMAP[0] CSR will be not just pointless, but in the
later case erroneous since the CSR fields will contain zeros which will be
perceived by the mapping detection procedure as a valid value. So the
mapping will get to be invalid. Thus make sure the ADDRMAP[0] register is
parsed only if a multi-ranked memory setup has been detected.

Signed-off-by: Serge Semin <fancer.lancer@gmail.com>
---
 drivers/edac/synopsys_edac.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)
diff mbox series

Patch

diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c
index 5a06038aedcb..e6288e135480 100644
--- a/drivers/edac/synopsys_edac.c
+++ b/drivers/edac/synopsys_edac.c
@@ -1146,9 +1146,12 @@  static void snps_setup_bg_address_map(struct snps_edac_priv *priv, u32 *addrmap)
 
 static void snps_setup_rank_address_map(struct snps_edac_priv *priv, u32 *addrmap)
 {
-	priv->rank_shift[0] = ((addrmap[0] & RANK_MAX_VAL_MASK) ==
-				RANK_MAX_VAL_MASK) ? 0 : ((addrmap[0] &
-				RANK_MAX_VAL_MASK) + RANK_B0_BASE);
+	/* Ranks mapping is unavailable for the single-ranked memory */
+	if (priv->info.ranks > 1) {
+		priv->rank_shift[0] = ((addrmap[0] & RANK_MAX_VAL_MASK) ==
+					RANK_MAX_VAL_MASK) ? 0 : ((addrmap[0] &
+					RANK_MAX_VAL_MASK) + RANK_B0_BASE);
+	}
 }
 
 /**