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Mon, 02 Oct 2023 10:14:10 -0700 (PDT) Received: from localhost.localdomain ([50.212.55.89]) by smtp.gmail.com with ESMTPSA id dy52-20020a05620a60f400b007678973eaa1sm9132660qkb.127.2023.10.02.10.14.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Oct 2023 10:14:10 -0700 (PDT) From: Ben Wolsieffer To: linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Ben Wolsieffer Subject: [PATCH 1/2] ARM: dts: stm32: add stm32f7 SDIO sleep pins Date: Mon, 2 Oct 2023 13:13:38 -0400 Message-ID: <20231002171339.1594470-2-ben.wolsieffer@hefring.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231002171339.1594470-1-ben.wolsieffer@hefring.com> References: <20231002171339.1594470-1-ben.wolsieffer@hefring.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231002_101414_511735_4FBCC8FD X-CRM114-Status: GOOD ( 11.20 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add SDIO sleep pin definitions that place the pins in analog mode to save power. Signed-off-by: Ben Wolsieffer --- arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi index 9f65403295ca..26f91ca0d458 100644 --- a/arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi @@ -253,6 +253,17 @@ pins2 { }; }; + sdio_pins_sleep_a: sdio-pins-sleep-a-0 { + pins { + pinmux = , /* SDMMC1 D0 */ + , /* SDMMC1 D1 */ + , /* SDMMC1 D2 */ + , /* SDMMC1 D3 */ + , /* SDMMC1 CLK */ + ; /* SDMMC1 CMD */ + }; + }; + sdio_pins_b: sdio-pins-b-0 { pins { pinmux = , /* SDMMC2 D0 */ @@ -284,6 +295,17 @@ pins2 { }; }; + sdio_pins_sleep_b: sdio-pins-sleep-b-0 { + pins { + pinmux = , /* SDMMC2 D0 */ + , /* SDMMC2 D1 */ + , /* SDMMC2 D2 */ + , /* SDMMC2 D3 */ + , /* SDMMC2 CLK */ + ; /* SDMMC2 CMD */ + }; + }; + can1_pins_a: can1-0 { pins1 { pinmux = ; /* CAN1_TX */