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Mon, 9 Oct 2023 08:09:59 -0500 From: Jai Luthra To: Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sakari Ailus , Tomi Valkeinen CC: , , , , Laurent Pinchart , Mauro Carvalho Chehab , Maxime Ripard , , Benoit Parrot , Vaishnav Achath , Vignesh Raghavendra , , , , , Martyn Welch , Julien Massot Subject: [PATCH v10 12/13] media: dt-bindings: Add TI J721E CSI2RX Date: Mon, 9 Oct 2023 18:39:38 +0530 Message-ID: <20231009-upstream_csi-v10-12-330aaed24c5d@ti.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231009-upstream_csi-v10-0-330aaed24c5d@ti.com> References: <20231009-upstream_csi-v10-0-330aaed24c5d@ti.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3456; i=j-luthra@ti.com; h=from:subject:message-id; bh=WYour5MHSnxPJZpjcSMo7Wyiio5vA12V0oZpUUm9GB8=; b=owEBbQKS/ZANAwAIAUPekfkkmnFFAcsmYgBlI/sve3Lp7c8vQpNZBJsppkyHCOLXPNxwgUlli Fz5VnW/hpeJAjMEAAEIAB0WIQRN4NgY5dV16NRar8VD3pH5JJpxRQUCZSP7LwAKCRBD3pH5JJpx RT2bD/sF4BQGBzybXda5AwzLpyvjQtrYkHp42blCCZ6ON1Jd9Bh71YRKdNLCruRZUghYCIsbEju 3/7di58TJdStCkZ5kKgT98RaavWbZ80IPytmJOOwMlewZwpF3C9TH7vsJLQ1tLKHk1oazOy7/fC 1B+lEIs+dv4FFVJRHLH3wpUJNE1RFyabfR8a6hvvTd9glysnvcGlgWAKAaSUuo2m0DKU4Qf2MKP q+c+8LDcHImsSZW/A0GoELKVwC79sAznI+q8h6woPcq2oSwPKytCrhGn9yxx/D3nwFeoCOlJvwW e3l07CUGo2Wg65Jd/u27BQfHvUGU5McZvVcBiIWLJkWZUHMUzG5Mxxi0X94n+mBRR83bb3/z7IV JomKA3yLkbDTW4712fKr2xsAIJ3klPEvCOCnwHQ+5CX9a3ze6PsXVNkxSNozs9j6LE/cFcfaGB1 uW0/STReFakqReCLhcRB1WRtZXhjAO9DwV/zJcXCrADSqHAROnV24wxeKcPcvLTbATS9u3aL2IX NhNGjWs8jt35Cw1y5ivgBvhFc/dfk4Xjtio2cIYOjdFXKzAmuPxMwkTvyverpDxXQWCsiIJGSnZ oHlyMu1HE44y+zZkOsd2Gb2/J29WAnPZuLxP3/rtAC4Ft2Q0TKlzoxs+dFoNGjhMtrsEU51mgiW GGNZZTRjfymkckg== X-Developer-Key: i=j-luthra@ti.com; a=openpgp; fpr=4DE0D818E5D575E8D45AAFC543DE91F9249A7145 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231009_061007_885468_59575AF8 X-CRM114-Status: GOOD ( 13.43 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Pratyush Yadav TI's J721E uses the Cadence CSI2RX and DPHY peripherals to facilitate capture over a CSI-2 bus. The TI CSI2RX platform driver glues all the parts together. Signed-off-by: Pratyush Yadav Tested-by: Julien Massot Reviewed-by: Laurent Pinchart Reviewed-by: Rob Herring Signed-off-by: Jai Luthra --- .../bindings/media/ti,j721e-csi2rx-shim.yaml | 100 +++++++++++++++++++++ 1 file changed, 100 insertions(+) diff --git a/Documentation/devicetree/bindings/media/ti,j721e-csi2rx-shim.yaml b/Documentation/devicetree/bindings/media/ti,j721e-csi2rx-shim.yaml new file mode 100644 index 000000000000..f762fdc05e4d --- /dev/null +++ b/Documentation/devicetree/bindings/media/ti,j721e-csi2rx-shim.yaml @@ -0,0 +1,100 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/ti,j721e-csi2rx-shim.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI J721E CSI2RX Shim + +description: | + The TI J721E CSI2RX Shim is a wrapper around Cadence CSI2RX bridge that + enables sending captured frames to memory over PSI-L DMA. In the J721E + Technical Reference Manual (SPRUIL1B) it is referred to as "SHIM" under the + CSI_RX_IF section. + +maintainers: + - Jai Luthra + +properties: + compatible: + const: ti,j721e-csi2rx-shim + + dmas: + maxItems: 1 + + dma-names: + items: + - const: rx0 + + reg: + maxItems: 1 + + power-domains: + maxItems: 1 + + ranges: true + + "#address-cells": true + + "#size-cells": true + +patternProperties: + "^csi-bridge@": + type: object + description: CSI2 bridge node. + $ref: cdns,csi2rx.yaml# + +required: + - compatible + - reg + - dmas + - dma-names + - power-domains + - ranges + - "#address-cells" + - "#size-cells" + +additionalProperties: false + +examples: + - | + #include + + ti_csi2rx0: ticsi2rx@4500000 { + compatible = "ti,j721e-csi2rx-shim"; + dmas = <&main_udmap 0x4940>; + dma-names = "rx0"; + reg = <0x4500000 0x1000>; + power-domains = <&k3_pds 26 TI_SCI_PD_EXCLUSIVE>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + cdns_csi2rx: csi-bridge@4504000 { + compatible = "ti,j721e-csi2rx", "cdns,csi2rx"; + reg = <0x4504000 0x1000>; + clocks = <&k3_clks 26 2>, <&k3_clks 26 0>, <&k3_clks 26 2>, + <&k3_clks 26 2>, <&k3_clks 26 3>, <&k3_clks 26 3>; + clock-names = "sys_clk", "p_clk", "pixel_if0_clk", + "pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk"; + phys = <&dphy0>; + phy-names = "dphy"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + csi2_0: port@0 { + + reg = <0>; + + csi2rx0_in_sensor: endpoint { + remote-endpoint = <&csi2_cam0>; + bus-type = <4>; /* CSI2 DPHY. */ + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + }; + }; + };