From patchwork Mon Oct 9 08:24:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vaishnav Achath X-Patchwork-Id: 13413074 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5BFEEE95A8E for ; Mon, 9 Oct 2023 08:25:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=zfK9ii9BuF8UIhAWVQ02apWG0rA5rBPsBo7DNNZH8Lg=; b=VRq38cerhvlhdH U1upimT5gKvEgvRbvPdcfElC7kmzktYPAbSOc4eOK0vKOn3ZUx0e45u71AxYpurlEmSBBHgGuDQJX asMRmRcYBEsNyD89buMXd+ORTHTLVT++awH7Ge8gyzK6AUMfyUCJsetvftidj0I9cMEtspgPCi8Wm SXItUdyMjEW0ylPOvj8ajyf+4rC8E2ISkbrbDhZJ49V3ByRL0yZYMmsadroMkGo19Rvj56+DlE3th x1tT3Fozmsby01i2rCTuDP4Ppm8UbjsOHgOgVqemiGl+fIOIf4Tt13pckb+/aqo1/NcmGImwsFcvG +D+9gnlvnOhgIOaygzEg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qplZb-009xpM-26; Mon, 09 Oct 2023 08:25:07 +0000 Received: from lelv0143.ext.ti.com ([198.47.23.248]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qplZW-009xo3-0M for linux-arm-kernel@lists.infradead.org; Mon, 09 Oct 2023 08:25:04 +0000 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 3998OvSC113202; Mon, 9 Oct 2023 03:24:57 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1696839897; bh=6CUEfob1eTuTNDwPDWxHPPdLoxZKdWl+rwGTsOsFtdI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=ngWHJOxErS3jJzGAfoUxtKSlT8QGz0A8K19bdcHKJN77sCGQ1M1gff34D/WHyUtlh qUhzb1FaNbg5wN9XzkSbWVlcy+Eujy0A+3z8GHeHU0jjiQUQx/F0OR6NlbMJMJm/xs b0UBQHrF6CEPma6UUus9TbQP+QrvNKJa+6Pg7PE8= Received: from DFLE111.ent.ti.com (dfle111.ent.ti.com [10.64.6.32]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 3998OvoY034384 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 9 Oct 2023 03:24:57 -0500 Received: from DFLE111.ent.ti.com (10.64.6.32) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 9 Oct 2023 03:24:57 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 9 Oct 2023 03:24:57 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3998Ouu0122538; Mon, 9 Oct 2023 03:24:56 -0500 From: Vaishnav Achath To: , , , , CC: , , , , , Subject: [PATCH v4 2/2] arm64: dts: ti: k3-j7200-mcu-wakeup: Update fss node and hbmc_mux Date: Mon, 9 Oct 2023 13:54:52 +0530 Message-ID: <20231009082452.30684-3-vaishnav.a@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231009082452.30684-1-vaishnav.a@ti.com> References: <20231009082452.30684-1-vaishnav.a@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231009_012502_256051_01D25288 X-CRM114-Status: GOOD ( 12.16 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Nishanth Menon FSS node claims to be a syscon node, while it actually is a simple bus where OSPI, HBMC peripherals are located and a mux for path select between OSPI and Hyperbus which can be modelled as a reg-mux. So model it accordingly and use reg-mux to describe the hbmc_mux. Signed-off-by: Nishanth Menon Signed-off-by: Vaishnav Achath Reviewed-by: Reid Tonking --- V2->V3: * Keep register regions unchanged as it is correct according to memory map. * Update commit messages as per Vignesh's suggestion. V1->V2: * Address feedback from Udit to limit the FSS register region size as per TRM. * Use reg-mux changes to simplify the hbmc-mux modelling. * Update commit message to reflect changes. Depends on: https://lore.kernel.org/all/20230911151030.71100-1-afd@ti.com/ arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi index 2ee6215e38a6..4f98ea685d33 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi @@ -507,15 +507,16 @@ status = "disabled"; }; - fss: syscon@47000000 { - compatible = "syscon", "simple-mfd"; + fss: bus@47000000 { + compatible = "simple-bus"; reg = <0x00 0x47000000 0x00 0x100>; #address-cells = <2>; #size-cells = <2>; ranges; - hbmc_mux: hbmc-mux { - compatible = "mmio-mux"; + hbmc_mux: mux-controller@47000004 { + compatible = "reg-mux"; + reg = <0x00 0x47000004 0x00 0x2>; #mux-control-cells = <1>; mux-reg-masks = <0x4 0x2>; /* HBMC select */ };