diff mbox series

[v2,4/5] perf: fsl_imx8_ddr: Add driver support for i.MX8DXL DDR Perf

Message ID 20231011060838.3413621-4-xu.yang_2@nxp.com (mailing list archive)
State New, archived
Headers show
Series [v2,1/5] perf: fsl_imx8_ddr: Add AXI ID PORT CHANNEL filter support | expand

Commit Message

Xu Yang Oct. 11, 2023, 6:08 a.m. UTC
Add driver support for i.MX8DXL DDR Perf, which supports AXI ID PORT
CHANNEL filter.

Signed-off-by: Xu Yang <xu.yang_2@nxp.com>

---
Changes since v2:
 - no changes
---
 drivers/perf/fsl_imx8_ddr_perf.c | 6 ++++++
 1 file changed, 6 insertions(+)

Comments

Frank Li Oct. 12, 2023, 4:09 p.m. UTC | #1
> -----Original Message-----
> From: Xu Yang <xu.yang_2@nxp.com>
> Sent: Wednesday, October 11, 2023 1:09 AM
> To: Frank Li <frank.li@nxp.com>; corbet@lwn.net; shawnguo@kernel.org;
> s.hauer@pengutronix.de; kernel@pengutronix.de; will@kernel.org;
> mark.rutland@arm.com; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org
> Cc: festevam@gmail.com; conor+dt@kernel.org; dl-linux-imx <linux-
> imx@nxp.com>; linux-arm-kernel@lists.infradead.org; linux-
> doc@vger.kernel.org; devicetree@vger.kernel.org; Xu Yang
> <xu.yang_2@nxp.com>
> Subject: [PATCH v2 4/5] perf: fsl_imx8_ddr: Add driver support for i.MX8DXL
> DDR Perf
> 
> Add driver support for i.MX8DXL DDR Perf, which supports AXI ID PORT
> CHANNEL filter.
> 
> Signed-off-by: Xu Yang <xu.yang_2@nxp.com>

Reviewed-by: Frank Li <Frank.Li@nxp.com>

> 
> ---
> Changes since v2:
>  - no changes
> ---
>  drivers/perf/fsl_imx8_ddr_perf.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/perf/fsl_imx8_ddr_perf.c
> b/drivers/perf/fsl_imx8_ddr_perf.c
> index d0eae2d7e64b..7dbfaee372c7 100644
> --- a/drivers/perf/fsl_imx8_ddr_perf.c
> +++ b/drivers/perf/fsl_imx8_ddr_perf.c
> @@ -92,6 +92,11 @@ static const struct fsl_ddr_devtype_data
> imx8mp_devtype_data = {
>  	.identifier = "i.MX8MP",
>  };
> 
> +static const struct fsl_ddr_devtype_data imx8dxl_devtype_data = {
> +	.quirks = DDR_CAP_AXI_ID_PORT_CHANNEL_FILTER,
> +	.identifier = "i.MX8DXL",
> +};
> +
>  static const struct of_device_id imx_ddr_pmu_dt_ids[] = {
>  	{ .compatible = "fsl,imx8-ddr-pmu", .data = &imx8_devtype_data},
>  	{ .compatible = "fsl,imx8m-ddr-pmu", .data =
> &imx8m_devtype_data},
> @@ -99,6 +104,7 @@ static const struct of_device_id imx_ddr_pmu_dt_ids[]
> = {
>  	{ .compatible = "fsl,imx8mm-ddr-pmu", .data =
> &imx8mm_devtype_data},
>  	{ .compatible = "fsl,imx8mn-ddr-pmu", .data =
> &imx8mn_devtype_data},
>  	{ .compatible = "fsl,imx8mp-ddr-pmu", .data =
> &imx8mp_devtype_data},
> +	{ .compatible = "fsl,imx8dxl-ddr-pmu", .data =
> &imx8dxl_devtype_data},
>  	{ /* sentinel */ }
>  };
>  MODULE_DEVICE_TABLE(of, imx_ddr_pmu_dt_ids);
> --
> 2.34.1
diff mbox series

Patch

diff --git a/drivers/perf/fsl_imx8_ddr_perf.c b/drivers/perf/fsl_imx8_ddr_perf.c
index d0eae2d7e64b..7dbfaee372c7 100644
--- a/drivers/perf/fsl_imx8_ddr_perf.c
+++ b/drivers/perf/fsl_imx8_ddr_perf.c
@@ -92,6 +92,11 @@  static const struct fsl_ddr_devtype_data imx8mp_devtype_data = {
 	.identifier = "i.MX8MP",
 };
 
+static const struct fsl_ddr_devtype_data imx8dxl_devtype_data = {
+	.quirks = DDR_CAP_AXI_ID_PORT_CHANNEL_FILTER,
+	.identifier = "i.MX8DXL",
+};
+
 static const struct of_device_id imx_ddr_pmu_dt_ids[] = {
 	{ .compatible = "fsl,imx8-ddr-pmu", .data = &imx8_devtype_data},
 	{ .compatible = "fsl,imx8m-ddr-pmu", .data = &imx8m_devtype_data},
@@ -99,6 +104,7 @@  static const struct of_device_id imx_ddr_pmu_dt_ids[] = {
 	{ .compatible = "fsl,imx8mm-ddr-pmu", .data = &imx8mm_devtype_data},
 	{ .compatible = "fsl,imx8mn-ddr-pmu", .data = &imx8mn_devtype_data},
 	{ .compatible = "fsl,imx8mp-ddr-pmu", .data = &imx8mp_devtype_data},
+	{ .compatible = "fsl,imx8dxl-ddr-pmu", .data = &imx8dxl_devtype_data},
 	{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, imx_ddr_pmu_dt_ids);