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Fri, 13 Oct 2023 04:49:06 -0700 (PDT) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:4209:13a:988d:80be]) by smtp.gmail.com with ESMTPSA id j23-20020a05600c1c1700b00407754b998dsm974509wms.27.2023.10.13.04.49.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Oct 2023 04:49:05 -0700 (PDT) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Elliot Berman , Krzysztof Kozlowski , Guru Das Srinagesh , Andrew Halaney , Maximilian Luz , Alex Elder , Srini Kandagatla Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@quicinc.com, Bartosz Golaszewski Subject: [PATCH v4 13/15] firmware: qcom: tzmem: enable SHM Bridge support Date: Fri, 13 Oct 2023 13:48:41 +0200 Message-Id: <20231013114843.63205-14-brgl@bgdev.pl> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231013114843.63205-1-brgl@bgdev.pl> References: <20231013114843.63205-1-brgl@bgdev.pl> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231013_044909_974025_6F994BFF X-CRM114-Status: GOOD ( 17.64 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Bartosz Golaszewski Add a new Kconfig option for selecting the SHM Bridge mode of operation for the TrustZone memory allocator. If enabled at build-time, it will still be checked for availability at run-time. If the architecture doesn't support SHM Bridge, the allocator will work just like in the default mode. Signed-off-by: Bartosz Golaszewski --- drivers/firmware/qcom/Kconfig | 10 +++++ drivers/firmware/qcom/qcom_tzmem.c | 65 +++++++++++++++++++++++++++++- 2 files changed, 74 insertions(+), 1 deletion(-) diff --git a/drivers/firmware/qcom/Kconfig b/drivers/firmware/qcom/Kconfig index 237da40de832..e01407e31ae4 100644 --- a/drivers/firmware/qcom/Kconfig +++ b/drivers/firmware/qcom/Kconfig @@ -27,6 +27,16 @@ config QCOM_TZMEM_MODE_DEFAULT Use the default allocator mode. The memory is page-aligned, non-cachable and contiguous. +config QCOM_TZMEM_MODE_SHMBRIDGE + bool "SHM Bridge" + help + Use Qualcomm Shared Memory Bridge. The memory has the same alignment as + in the 'Default' allocator but is also explicitly marked as an SHM Bridge + buffer. + + With this selected, all buffers passed to the TrustZone must be allocated + using the TZMem allocator or else the TrustZone will refuse to use them. + endchoice config QCOM_SCM_DOWNLOAD_MODE_DEFAULT diff --git a/drivers/firmware/qcom/qcom_tzmem.c b/drivers/firmware/qcom/qcom_tzmem.c index 68ca59c5598e..6c4f29a00f26 100644 --- a/drivers/firmware/qcom/qcom_tzmem.c +++ b/drivers/firmware/qcom/qcom_tzmem.c @@ -55,7 +55,70 @@ static void qcom_tzmem_cleanup_pool(struct qcom_tzmem_pool *pool) } -#endif /* CONFIG_QCOM_TZMEM_MODE_DEFAULT */ +#elif IS_ENABLED(CONFIG_QCOM_TZMEM_MODE_SHMBRIDGE) + +#include + +#define QCOM_SHM_BRIDGE_NUM_VM_SHIFT 9 + +static bool qcom_tzmem_using_shm_bridge; + +static int qcom_tzmem_init(void) +{ + int ret; + + ret = qcom_scm_shm_bridge_enable(); + if (ret == -EOPNOTSUPP) { + dev_info(qcom_tzmem_dev, "SHM Bridge not supported\n"); + ret = 0; + } + + if (!ret) + qcom_tzmem_using_shm_bridge = true; + + return ret; +} + +static int qcom_tzmem_init_pool(struct qcom_tzmem_pool *pool) +{ + u64 pfn_and_ns_perm, ipfn_and_s_perm, size_and_flags, ns_perms; + int ret; + + if (!qcom_tzmem_using_shm_bridge) + return 0; + + ns_perms = (QCOM_SCM_PERM_WRITE | QCOM_SCM_PERM_READ); + pfn_and_ns_perm = (u64)pool->pbase | ns_perms; + ipfn_and_s_perm = (u64)pool->pbase | ns_perms; + size_and_flags = pool->size | (1 << QCOM_SHM_BRIDGE_NUM_VM_SHIFT); + + u64 *handle __free(kfree) = kzalloc(sizeof(*handle), GFP_KERNEL); + if (!handle) + return -ENOMEM; + + ret = qcom_scm_shm_bridge_create(qcom_tzmem_dev, pfn_and_ns_perm, + ipfn_and_s_perm, size_and_flags, + QCOM_SCM_VMID_HLOS, handle); + if (ret) + return ret; + + pool->priv = no_free_ptr(handle); + + return 0; +} + +static void qcom_tzmem_cleanup_pool(struct qcom_tzmem_pool *pool) +{ + u64 *handle = pool->priv; + + if (!qcom_tzmem_using_shm_bridge) + return; + + qcom_scm_shm_bridge_delete(qcom_tzmem_dev, *handle); + kfree(handle); +} + +#endif /* CONFIG_QCOM_TZMEM_MODE_SHMBRIDGE */ /** * qcom_tzmem_pool_new() - Create a new TZ memory pool.