| Message ID | 20231016152450.2850498-2-Frank.Li@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/2] dt-bindings: i3c: Fix silvaco,i3c-master compatible string | expand |
On Mon, Oct 16, 2023 at 11:24:50AM -0400, Frank Li wrote: > Add I3C1 and I3C2. > > Signed-off-by: Frank Li <Frank.Li@nxp.com> > --- > arch/arm64/boot/dts/freescale/imx93.dtsi | 26 ++++++++++++++++++++++++ > 1 file changed, 26 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi > index 6f85a05ee7e1..4d9ed0b32853 100644 > --- a/arch/arm64/boot/dts/freescale/imx93.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi > @@ -242,6 +242,19 @@ tpm2: pwm@44320000 { > status = "disabled"; > }; > > + i3c1: i3c-master@44330000 { > + compatible = "silvaco,i3c-master"; The real problem here is not whether we have "v1" or not, but you need an SoC specific compatible. Unless there's a public spec where we can know exactly how many resets, clocks, interrupts, etc. Rob
diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi index 6f85a05ee7e1..4d9ed0b32853 100644 --- a/arch/arm64/boot/dts/freescale/imx93.dtsi +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi @@ -242,6 +242,19 @@ tpm2: pwm@44320000 { status = "disabled"; }; + i3c1: i3c-master@44330000 { + compatible = "silvaco,i3c-master"; + reg = <0x44330000 0x10000>; + interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <3>; + #size-cells = <0>; + clocks = <&clk IMX93_CLK_BUS_AON>, + <&clk IMX93_CLK_I3C1_GATE>, + <&clk IMX93_CLK_I3C1_SLOW>; + clock-names = "pclk", "fast_clk", "slow_clk"; + status = "disabled"; + }; + lpi2c1: i2c@44340000 { compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c"; reg = <0x44340000 0x10000>; @@ -496,6 +509,19 @@ tpm6: pwm@42510000 { status = "disabled"; }; + i3c2: i3c-master@42520000 { + compatible = "silvaco,i3c-master"; + reg = <0x42520000 0x10000>; + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <3>; + #size-cells = <0>; + clocks = <&clk IMX93_CLK_BUS_WAKEUP>, + <&clk IMX93_CLK_I3C2_GATE>, + <&clk IMX93_CLK_I3C2_SLOW>; + clock-names = "pclk", "fast_clk", "slow_clk"; + status = "disabled"; + }; + lpi2c3: i2c@42530000 { compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c"; reg = <0x42530000 0x10000>;
Add I3C1 and I3C2. Signed-off-by: Frank Li <Frank.Li@nxp.com> --- arch/arm64/boot/dts/freescale/imx93.dtsi | 26 ++++++++++++++++++++++++ 1 file changed, 26 insertions(+)