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Thu, 19 Oct 2023 07:41:07 -0700 (PDT) Date: Thu, 19 Oct 2023 14:40:32 +0000 In-Reply-To: <20231019144032.2943044-1-sebastianene@google.com> Mime-Version: 1.0 References: <20231019144032.2943044-1-sebastianene@google.com> X-Mailer: git-send-email 2.42.0.655.g421f12c284-goog Message-ID: <20231019144032.2943044-12-sebastianene@google.com> Subject: [PATCH v2 10/11] arm64: ptdump: Interpret pKVM ownership annotations From: Sebastian Ene To: will@kernel.org, catalin.marinas@arm.com, mark.rutland@arm.com, akpm@linux-foundation.org, maz@kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel-team@android.com, vdonnefort@google.com, qperret@google.com, smostafa@google.com, Sebastian Ene X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231019_074110_066772_61EB1595 X-CRM114-Status: GOOD ( 12.69 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add support for interpretting pKVM invalid stage-2 descriptors that hold ownership information. We use these descriptors to keep track of the memory donations from the host side. Signed-off-by: Sebastian Ene --- arch/arm64/include/asm/kvm_pgtable.h | 7 +++++++ arch/arm64/kvm/hyp/include/nvhe/mem_protect.h | 7 ------- arch/arm64/mm/ptdump.c | 10 ++++++++++ 3 files changed, 17 insertions(+), 7 deletions(-) diff --git a/arch/arm64/include/asm/kvm_pgtable.h b/arch/arm64/include/asm/kvm_pgtable.h index 913f34d75b29..938baffa7d4d 100644 --- a/arch/arm64/include/asm/kvm_pgtable.h +++ b/arch/arm64/include/asm/kvm_pgtable.h @@ -87,6 +87,13 @@ typedef u64 kvm_pte_t; */ #define KVM_INVALID_PTE_LOCKED BIT(10) +/* This corresponds to page-table locking order */ +enum pkvm_component_id { + PKVM_ID_HOST, + PKVM_ID_HYP, + PKVM_ID_FFA, +}; + static inline bool kvm_pte_valid(kvm_pte_t pte) { return pte & KVM_PTE_VALID; diff --git a/arch/arm64/kvm/hyp/include/nvhe/mem_protect.h b/arch/arm64/kvm/hyp/include/nvhe/mem_protect.h index 9cfb35d68850..cc2c439ffe75 100644 --- a/arch/arm64/kvm/hyp/include/nvhe/mem_protect.h +++ b/arch/arm64/kvm/hyp/include/nvhe/mem_protect.h @@ -53,13 +53,6 @@ struct host_mmu { }; extern struct host_mmu host_mmu; -/* This corresponds to page-table locking order */ -enum pkvm_component_id { - PKVM_ID_HOST, - PKVM_ID_HYP, - PKVM_ID_FFA, -}; - extern unsigned long hyp_nr_cpus; int __pkvm_prot_finalize(void); diff --git a/arch/arm64/mm/ptdump.c b/arch/arm64/mm/ptdump.c index 5f9a334b0f0c..4687840dcb69 100644 --- a/arch/arm64/mm/ptdump.c +++ b/arch/arm64/mm/ptdump.c @@ -272,6 +272,16 @@ static const struct prot_bits stage2_pte_bits[] = { .val = PTE_S2_MEMATTR(MT_S2_FWB_NORMAL) | PTE_VALID, .set = "MEM/NORMAL FWB", .feature_on = is_fwb_enabled, + }, { + .mask = KVM_INVALID_PTE_OWNER_MASK | PTE_VALID, + .val = FIELD_PREP_CONST(KVM_INVALID_PTE_OWNER_MASK, + PKVM_ID_HYP), + .set = "HYP", + }, { + .mask = KVM_INVALID_PTE_OWNER_MASK | PTE_VALID, + .val = FIELD_PREP_CONST(KVM_INVALID_PTE_OWNER_MASK, + PKVM_ID_FFA), + .set = "FF-A", }, { .mask = KVM_PGTABLE_PROT_SW0, .val = KVM_PGTABLE_PROT_SW0,