diff mbox series

arm64: dts: ti: k3-j7200-som-p0: Add TP6594 family PMICs

Message ID 20231027082852.2922552-1-thomas.richard@bootlin.com (mailing list archive)
State New, archived
Headers show
Series arm64: dts: ti: k3-j7200-som-p0: Add TP6594 family PMICs | expand

Commit Message

Thomas Richard Oct. 27, 2023, 8:28 a.m. UTC
From: Esteban Blanc <eblanc@baylibre.com>

This patch adds support for TPS6594 PMIC family on wakup I2C0 bus.
Theses devices provides regulators (bucks and LDOs), but also
GPIOs, a RTC, a watchdog, an ESM (Error Signal Monitor)
which monitors the SoC error output signal, and a PFSM
(Pre-configurable Finite State Machine) which manages the
operational modes of the PMIC.

Signed-off-by: Esteban Blanc <eblanc@baylibre.com>
Signed-off-by: Jai Luthra <j-luthra@ti.com>
Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
---

Notes:
    This patch was picked from:
    https://lore.kernel.org/all/20230810-tps6594-v6-0-2b2e2399e2ef@ti.com/
    
    I reviewed it, and checked that there is no issue during the boot.

 arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 157 ++++++++++++++++++++
 1 file changed, 157 insertions(+)

Comments

Nishanth Menon Dec. 1, 2023, 5:14 a.m. UTC | #1
On 10:28-20231027, Thomas Richard wrote:
> From: Esteban Blanc <eblanc@baylibre.com>
> 
> This patch adds support for TPS6594 PMIC family on wakup I2C0 bus.
> Theses devices provides regulators (bucks and LDOs), but also
> GPIOs, a RTC, a watchdog, an ESM (Error Signal Monitor)
> which monitors the SoC error output signal, and a PFSM
> (Pre-configurable Finite State Machine) which manages the
> operational modes of the PMIC.
> 
> Signed-off-by: Esteban Blanc <eblanc@baylibre.com>
> Signed-off-by: Jai Luthra <j-luthra@ti.com>
> Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
> ---
> 
> Notes:
>     This patch was picked from:
>     https://lore.kernel.org/all/20230810-tps6594-v6-0-2b2e2399e2ef@ti.com/
>     
>     I reviewed it, and checked that there is no issue during the boot.

Thank you, but I am considering a more comprehensive series from Neha[1]
instead, if you don't mind.

[1] https://lore.kernel.org/all/20231128055230.342547-1-n-francis@ti.com/
Thomas Richard Dec. 1, 2023, 8:31 a.m. UTC | #2
On 12/1/23 06:14, Nishanth Menon wrote:
> On 10:28-20231027, Thomas Richard wrote:
>> From: Esteban Blanc <eblanc@baylibre.com>
>>
>> This patch adds support for TPS6594 PMIC family on wakup I2C0 bus.
>> Theses devices provides regulators (bucks and LDOs), but also
>> GPIOs, a RTC, a watchdog, an ESM (Error Signal Monitor)
>> which monitors the SoC error output signal, and a PFSM
>> (Pre-configurable Finite State Machine) which manages the
>> operational modes of the PMIC.
>>
>> Signed-off-by: Esteban Blanc <eblanc@baylibre.com>
>> Signed-off-by: Jai Luthra <j-luthra@ti.com>
>> Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
>> ---
>>
>> Notes:
>>     This patch was picked from:
>>     https://lore.kernel.org/all/20230810-tps6594-v6-0-2b2e2399e2ef@ti.com/
>>     
>>     I reviewed it, and checked that there is no issue during the boot.
> 
> Thank you, but I am considering a more comprehensive series from Neha[1]
> instead, if you don't mind.

It's ok for me.
Neha told me he sent a new version of the series.
I sent only this patch, as I was able to test only j7200.

Regards,

Thomas
Nishanth Menon Dec. 1, 2023, 9:01 a.m. UTC | #3
On 09:31-20231201, Thomas Richard wrote:
> On 12/1/23 06:14, Nishanth Menon wrote:
> > On 10:28-20231027, Thomas Richard wrote:
> >> From: Esteban Blanc <eblanc@baylibre.com>
> >>
> >> This patch adds support for TPS6594 PMIC family on wakup I2C0 bus.
> >> Theses devices provides regulators (bucks and LDOs), but also
> >> GPIOs, a RTC, a watchdog, an ESM (Error Signal Monitor)
> >> which monitors the SoC error output signal, and a PFSM
> >> (Pre-configurable Finite State Machine) which manages the
> >> operational modes of the PMIC.
> >>
> >> Signed-off-by: Esteban Blanc <eblanc@baylibre.com>
> >> Signed-off-by: Jai Luthra <j-luthra@ti.com>
> >> Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
> >> ---
> >>
> >> Notes:
> >>     This patch was picked from:
> >>     https://lore.kernel.org/all/20230810-tps6594-v6-0-2b2e2399e2ef@ti.com/
> >>     
> >>     I reviewed it, and checked that there is no issue during the boot.
> > 
> > Thank you, but I am considering a more comprehensive series from Neha[1]
> > instead, if you don't mind.
> 
> It's ok for me.
> Neha told me he sent a new version of the series.
> I sent only this patch, as I was able to test only j7200.

Thanks. will look at Neha's series in my next iteration.
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
index 5a300d4c8ba0..f23b37293c8b 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
@@ -127,6 +127,14 @@  J721E_WKUP_IOPAD(0x9c, PIN_INPUT_PULLUP, 0) /* (H21) WKUP_I2C0_SDA */
 	};
 };
 
+&wkup_pmx3 {
+	pmic_irq_pins_default: pmic-irq-default-pins {
+		pinctrl-single,pins = <
+			J721E_WKUP_IOPAD(0x01c, PIN_INPUT, 7) /* (E18) WKUP_GPIO0_84 */
+		>;
+	};
+};
+
 &main_pmx0 {
 	main_i2c0_pins_default: main-i2c0-default-pins {
 		pinctrl-single,pins = <
@@ -264,6 +272,155 @@  eeprom@50 {
 		compatible = "atmel,24c256";
 		reg = <0x50>;
 	};
+
+	tps659414: pmic@48 {
+		compatible = "ti,tps6594-q1";
+		reg = <0x48>;
+		ti,primary-pmic;
+		system-power-controller;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_irq_pins_default>;
+		interrupt-parent = <&wkup_gpio0>;
+		interrupts = <84 IRQ_TYPE_EDGE_FALLING>;
+
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		buck1-supply = <&vsys_3v3>;
+		buck2-supply = <&vsys_3v3>;
+		buck3-supply = <&vsys_3v3>;
+		buck4-supply = <&vsys_3v3>;
+		buck5-supply = <&vsys_3v3>;
+		ldo1-supply = <&vsys_3v3>;
+		ldo2-supply = <&vsys_3v3>;
+		ldo3-supply = <&vsys_3v3>;
+		ldo4-supply = <&vsys_3v3>;
+
+		regulators {
+			bucka1: buck1 {
+				regulator-name = "vda_mcu_1v8";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			bucka2: buck2 {
+				regulator-name = "vdd_mcuio_1v8";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			bucka3: buck3 {
+				regulator-name = "vdd_mcu_0v85";
+				regulator-min-microvolt = <850000>;
+				regulator-max-microvolt = <850000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			bucka4: buck4 {
+				regulator-name = "vdd_ddr_1v1";
+				regulator-min-microvolt = <1100000>;
+				regulator-max-microvolt = <1100000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			bucka5: buck5 {
+				regulator-name = "vdd_phyio_1v8";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldoa1: ldo1 {
+				regulator-name = "vdd1_lpddr4_1v8";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldoa2: ldo2 {
+				regulator-name = "vda_dll_0v8";
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <800000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldoa3: ldo3 {
+				regulator-name = "vdd_wk_0v8";
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <800000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldoa4: ldo4 {
+				regulator-name = "vda_pll_1v8";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+		};
+	};
+
+	lp876441: pmic@4c {
+		compatible = "ti,lp8764-q1";
+		reg = <0x4c>;
+		system-power-controller;
+		interrupt-parent = <&wkup_gpio0>;
+		interrupts = <84 IRQ_TYPE_EDGE_FALLING>;
+
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		buck1-supply = <&vsys_3v3>;
+		buck2-supply = <&vsys_3v3>;
+		buck3-supply = <&vsys_3v3>;
+		buck4-supply = <&vsys_3v3>;
+
+		regulators: regulators {
+			buckb1: buck1 {
+				regulator-name = "vdd_cpu_avs";
+				regulator-min-microvolt = <600000>;
+				regulator-max-microvolt = <900000>;
+				regulator-always-on;
+				regulator-boot-on;
+			};
+
+			buckb2: buck2 {
+				regulator-name = "vdd_ram_0v85";
+				regulator-min-microvolt = <850000>;
+				regulator-max-microvolt = <850000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			buckb3: buck3 {
+				regulator-name = "vdd_core_0v85";
+				regulator-min-microvolt = <850000>;
+				regulator-max-microvolt = <850000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			buckb4: buck4 {
+				regulator-name = "vdd_io_1v8";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+		};
+	};
 };
 
 &ospi0 {