From patchwork Sun Oct 29 04:27:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 13439670 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 26D66C41535 for ; Sun, 29 Oct 2023 04:28:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=mesfnPaLrG9jToiOr8Qq8TXNEDCdaOiNZ8tuAjB6r6Y=; b=dyfX+5rWeifboR JElk8owPiD/wLfiqK6FrNkXXMcIjxIzd6rpiSKpzQMf8GDwTtTKaJg6nbr/E4FaJQGesEGfpVvWcp yDVWN3x8Jldie4yC0Dgx5kXywjzKIS/0ZamAe7fQW5nStVuJuCinati/muHIqxYgNxf82Q4vxlz/Y aYNRSTPjvzsftBdpB6bfyvH7vn8XNBTp2dW/C0YuaCZcDDTPGoB1bQ7UJ1Z0GCioGOswUc665xwtk ZgF1qpbX2K0TT0AhY+dpGF7Pw25PDH/wL6ZPzBuUMuzIVjxPc3twn7f68SliO7jQhafsq0H31lHRs YEgdekNDnsLU2iJ4+7wg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qwxPU-0019b2-2i; Sun, 29 Oct 2023 04:28:24 +0000 Received: from madras.collabora.co.uk ([46.235.227.172]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qwxOn-00190p-1S; Sun, 29 Oct 2023 04:27:43 +0000 Received: from localhost (unknown [188.24.143.101]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id 0F09A6607389; Sun, 29 Oct 2023 04:27:40 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1698553660; bh=fo6HEuz5sJOg727sDFQWk+LeppJl81dX/k1wa7xON88=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iMRgCpF7osoY3RVkpyYj8QNWRMXBGY/WK2XOrfNGUB2rnbJ5DORbiCiVbz75ThenZ 0gd0ey2nhUgbNaIDL6JN9zxl+EJq+zzj7jjUu0WM4ThiSSFg1RPmiRiF5QICSCVL1X 93/RCaEjL1WPlh/878jE0q31pz1EzjkdGJmLQgj1bMQWl7k7HGPhsFpD5AALGntsIx Qa6JS6V+No2AqxeS7ukWyOzsI/aE6w6854hukMPWAIwr6zHjPARTWusEixiOdUmaqB lIoWcsAbE4XmlWCWSe6W+gl6HIctXYNqD7C6ZtDcSBetdlOzHJpf0OWzbyflu+nlOp QWorF+FdL9wnw== From: Cristian Ciocaltea To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing , Samin Guo , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Richard Cochran , Giuseppe Cavallaro Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, kernel@collabora.com Subject: [PATCH v2 07/12] riscv: dts: starfive: jh7100: Add ccache DT node Date: Sun, 29 Oct 2023 06:27:07 +0200 Message-ID: <20231029042712.520010-8-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231029042712.520010-1-cristian.ciocaltea@collabora.com> References: <20231029042712.520010-1-cristian.ciocaltea@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231028_212741_630289_142E710D X-CRM114-Status: UNSURE ( 8.67 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Provide a DT node for the SiFive Composable Cache controller found on the StarFive JH7100 SoC. Note this is also used to support non-coherent DMA, via the sifive,cache-ops cache flushing operations. Signed-off-by: Cristian Ciocaltea --- arch/riscv/boot/dts/starfive/jh7100.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi index 06bb157ce111..a8a5bb00b0d8 100644 --- a/arch/riscv/boot/dts/starfive/jh7100.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi @@ -32,6 +32,7 @@ U74_0: cpu@0 { i-tlb-sets = <1>; i-tlb-size = <32>; mmu-type = "riscv,sv39"; + next-level-cache = <&ccache>; riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", @@ -60,6 +61,7 @@ U74_1: cpu@1 { i-tlb-sets = <1>; i-tlb-size = <32>; mmu-type = "riscv,sv39"; + next-level-cache = <&ccache>; riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", @@ -147,6 +149,18 @@ soc { dma-noncoherent; ranges; + ccache: cache-controller@2010000 { + compatible = "starfive,jh7100-ccache", "sifive,ccache0", "cache"; + reg = <0x0 0x2010000 0x0 0x1000>; + interrupts = <128>, <130>, <131>, <129>; + cache-block-size = <64>; + cache-level = <2>; + cache-sets = <2048>; + cache-size = <2097152>; + cache-unified; + sifive,cache-ops; + }; + clint: clint@2000000 { compatible = "starfive,jh7100-clint", "sifive,clint0"; reg = <0x0 0x2000000 0x0 0x10000>;