From patchwork Wed Nov 1 14:58:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 13442856 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B90E5C0018C for ; Wed, 1 Nov 2023 14:59:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ZQqeFVV3mNblZcEf8FCzeEAjUBtw8SGkPQqyEjAmmKQ=; b=Csk8zht2ArFn0q cqWCZkdNQX+4w/IKU0YhdZ8VroinXV+WjMx9jQX16Kiw8IDp4U9Fxc7m6GgYPCYmLYL9NxGUuwVgt yicrifeAcfAtNW3EsmRtj460LriFH5VF6CHds+GSyoXdUV/Iq8kCCCnpTHeE2lS4YubbOrtIr/i/C zCeEVpCDrXyvJHAJiKvdVTyM/qkvMoJRkx/WM3zqBFJt0q/raidMnVmuQxzwMRxD5N1ruEyzCmuTh zdZZBEjvqqhGE2pbRhMJO9nu/AtLBMGL3cyJhXcOO8Hhz3nx2QP7Fsi1gqlUofXkY+5MOs0TGuo18 rOUEl9vFmJ11LkcIpqtg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qyCgi-007gnX-1d; Wed, 01 Nov 2023 14:59:20 +0000 Received: from mail-ej1-x62a.google.com ([2a00:1450:4864:20::62a]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qyCgZ-007gfm-0E for linux-arm-kernel@lists.infradead.org; Wed, 01 Nov 2023 14:59:16 +0000 Received: by mail-ej1-x62a.google.com with SMTP id a640c23a62f3a-9becde9ea7bso200444666b.0 for ; Wed, 01 Nov 2023 07:59:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1698850747; x=1699455547; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=cc2RTGlWARp3griB6t8kpC6hCXGRaWKDTaju6cr+XBI=; b=ZUWlLANPRu9zAYpnvoFeoyj3cChkdNP05gJAhaU1qoFh7mLln+Tt9wjdMS6ikvrm4J z0Onlny5L7AB4A4PLLjHeI+S0TA9Mdx1I0UAmFjAxOkqbXCJtUWZ08ZM/q43SBM6QwSc VWucvZVCLzQIDJAlmU9gS823Mhgz09Eb7MV22WbR/TfNPB8Yxp7VH5hvD/jg1vdZY+vI qPIj/C2LHXDKcTTqtdULqzViSnRmNVhxEHOLMleukZ0NF2DBbn1MbjOOq/iPuUwLsHiE rijVCGRvRKjTBacwAJyzo92+RabLwKLse0Wowo6KCDF+Jh7V5fYr1ePmEqh4V7mEeoUs D27A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698850747; x=1699455547; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cc2RTGlWARp3griB6t8kpC6hCXGRaWKDTaju6cr+XBI=; b=cR8+BrttYmO4BXpLTOD+vOGi+kQubxvk2uWq5n+W3/g//uo4StjNmbVfWL1Mk3BYu5 SpFSUj+cTPrvpk16u+k5RMYxCc2xhLfaktvj6CoFjvZRN9Dem8VV7Ckg8cEVz+2AxgMn RtGkQScSg+SAgOpFcpQSJOGwfokTC6Prd8HyfxNRSh9zT4Qz95GU6Y8MvCyK0lQkEuPK rHOniutCpHPYludDjeHLG3KLwLgHuq8kCQnF+qBblBFGlXyWIjQ4sW2jPhPH92s1FO2L ioRnDHvRx3uvOQRPQf+0Koze1gDiVvqlqcHh36wrEbZwQMh4+QG29aG9Pr9DEMvQjHtw CgJA== X-Gm-Message-State: AOJu0Yyds/BeQQ1kLFW/05s5J+Cv/4OgCdYUhr5g0ych/XH4wkwd3iJ2 qB2ap6rZRjmCLaY/ajzMuatkrA== X-Google-Smtp-Source: AGHT+IFeHd2qAYY0FBzh63fvqvnbs/U3KH/28ZQtZLMHKMAnCTOsRCvAWN/9IFwyxwrP+OVaU3T+Sw== X-Received: by 2002:a17:906:b11a:b0:9aa:206d:b052 with SMTP id u26-20020a170906b11a00b009aa206db052mr2270730ejy.27.1698850747065; Wed, 01 Nov 2023 07:59:07 -0700 (PDT) Received: from tudordana.roam.corp.google.com ([79.115.63.76]) by smtp.gmail.com with ESMTPSA id i18-20020a170906115200b009ad8acac02asm20448eja.172.2023.11.01.07.59.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Nov 2023 07:59:06 -0700 (PDT) From: Tudor Ambarus To: michael@walle.cc, festevam@denx.de, takahiro.kuwano@infineon.com Cc: pratyush@kernel.org, linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, bacem.daassi@infineon.com, miquel.raynal@bootlin.com, richard@nod.at, Tudor Ambarus Subject: [PATCH v2 6/6] mtd: spi-nor: micron-st: Add support for mt25qu01g Date: Wed, 1 Nov 2023 14:58:53 +0000 Message-ID: <20231101145853.524045-7-tudor.ambarus@linaro.org> X-Mailer: git-send-email 2.42.0.820.g83a721a137-goog In-Reply-To: <20231101145853.524045-1-tudor.ambarus@linaro.org> References: <20231101145853.524045-1-tudor.ambarus@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231101_075911_108214_4A5AAA42 X-CRM114-Status: GOOD ( 12.98 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Fabio Estevam Add support for the MT25QU01G 128MB Micron Serial NOR Flash Memory model. Datasheet: https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-b/mt25q_qlkt_u_01g_bbb_0.pdf Tested on a i.MX8MP based board: # dmesg | grep spi-nor spi-nor spi0.0: mt25qu01g (131072 Kbytes) # cat /proc/mtd dev: size erasesize name mtd0: 08000000 00001000 "30bb0000.spi" ~# cat /sys/devices/platform/soc@0/30800000.bus/30bb0000.spi/spi_master/spi0/spi0.0/spi-nor/jedec_id 20bb21104400 ~# cat /sys/devices/platform/soc@0/30800000.bus/30bb0000.spi/spi_master/spi0/spi0.0/spi-nor/manufacturer st ~# cat /sys/devices/platform/soc@0/30800000.bus/30bb0000.spi/spi_master/spi0/spi0.0/spi-nor/partname mt25qu01g ~# xxd -p /sys/devices/platform/soc@0/30800000.bus/30bb0000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp 53464450060101ff00060110300000ff84000102800000ffffffffffffff ffffffffffffffffffffffffffffffffffffe520fbffffffff3f29eb276b 273b27bbffffffffffff27bbffff29eb0c2010d80f520000244a99008b8e 03e1ac0127387a757a75fbbdd55c4a0f82ff81bd3d36ffffffffffffffff ffffffffffffffffffe7ffff21dcffff ~# md5sum /sys/devices/platform/soc@0/30800000.bus/30bb0000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp 9d28d1b11de8b15ba9152644219d9a78 /sys/devices/platform/soc@0/30800000.bus/30bb0000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp Signed-off-by: Fabio Estevam [ta: introduce die erase] Signed-off-by: Tudor Ambarus --- drivers/mtd/spi-nor/micron-st.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-st.c index ab8a53f0c99f..42daa2116752 100644 --- a/drivers/mtd/spi-nor/micron-st.c +++ b/drivers/mtd/spi-nor/micron-st.c @@ -203,10 +203,24 @@ static int st_nor_four_die_late_init(struct spi_nor *nor) return 0; } +static int st_nor_two_die_late_init(struct spi_nor *nor) +{ + struct spi_nor_flash_parameter *params = nor->params; + + params->die_erase_opcode = SPINOR_OP_MT_DIE_ERASE; + params->n_dice = 2; + + return 0; +} + static struct spi_nor_fixups n25q00_fixups = { .late_init = st_nor_four_die_late_init, }; +static struct spi_nor_fixups mt25q01_fixups = { + .late_init = st_nor_two_die_late_init, +}; + static struct spi_nor_fixups mt25q02_fixups = { .late_init = st_nor_four_die_late_init, }; @@ -449,6 +463,11 @@ static const struct flash_info st_nor_parts[] = { SPI_NOR_BP3_SR_BIT6, .no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ, .mfr_flags = USE_FSR, + }, { + .id = SNOR_ID(0x20, 0xbb, 0x21, 0x10, 0x44, 0x00), + .name = "mt25qu01g", + .mfr_flags = USE_FSR, + .fixups = &mt25q01_fixups, }, { .id = SNOR_ID(0x20, 0xbb, 0x21), .name = "n25q00a",