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17 Nov 2023 18:14:57 +0000 From: Robert Hancock To: "michal.simek@amd.com" , "richard.rojfors@pelagicore.com" , "ben-linux@fluff.org" , "andi.shyti@kernel.org" CC: "linux-arm-kernel@lists.infradead.org" , "linux-i2c@vger.kernel.org" , Robert Hancock Subject: [PATCH 2/2] i2c: xiic: Try re-initialization on bus busy timeout Thread-Topic: [PATCH 2/2] i2c: xiic: Try re-initialization on bus busy timeout Thread-Index: AQHaGYH41/AHDHR55ES9zmu8RHrsHQ== Date: Fri, 17 Nov 2023 18:14:57 +0000 Message-ID: <20231117181238.3989861-3-robert.hancock@calian.com> References: <20231117181238.3989861-1-robert.hancock@calian.com> In-Reply-To: <20231117181238.3989861-1-robert.hancock@calian.com> Accept-Language: en-CA, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.42.0 user-agent: Evolution 3.48.4 (3.48.4-1.fc38) x-ms-publictraffictype: Email x-ms-traffictypediagnostic: YT2PR01MB8838:EE_|YQBPR01MB10797:EE_ x-ms-office365-filtering-correlation-id: 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j+Thrjkrcwdo6kPoRaD2QmprAAORT8dnj5Il+hLg1IGP5Ynot1smxPMHNjrq2RmVuWDk27gWVh3D9RgWB9J5f/EN1IYrJNc6lor/CG3jKLg= X-MS-Exchange-Transport-CrossTenantHeadersStamped: YQBPR01MB10797 X-Proofpoint-GUID: A780P-LXJL9G9i2fkStfCPsSvGVxCThi X-Proofpoint-ORIG-GUID: A780P-LXJL9G9i2fkStfCPsSvGVxCThi X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-17_17,2023-11-17_01,2023-05-22_02 X-Proofpoint-Spam-Reason: orgsafe X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231117_101515_203377_2DCF4301 X-CRM114-Status: GOOD ( 19.42 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In the event that the I2C bus was powered down when the I2C controller driver loads, or some spurious pulses occur on the I2C bus, it's possible that the controller detects a spurious I2C "start" condition. In this situation it may continue to report the bus is busy indefinitely and block the controller from working. The "single-master" DT flag can be specified to disable bus busy checks entirely, but this may not be safe to use in situations where other I2C masters may potentially exist. In the event that the controller reports "bus busy" for too long when starting a transaction, we can try reinitializing the controller to see if the busy condition clears. This allows recovering from this scenario. Fixes: e1d5b6598cdc ("i2c: Add support for Xilinx XPS IIC Bus Interface") Signed-off-by: Robert Hancock --- drivers/i2c/busses/i2c-xiic.c | 42 ++++++++++++++++++++++------------- 1 file changed, 27 insertions(+), 15 deletions(-) diff --git a/drivers/i2c/busses/i2c-xiic.c b/drivers/i2c/busses/i2c-xiic.c index 6e84b4d67fd9..a396560a7ba9 100644 --- a/drivers/i2c/busses/i2c-xiic.c +++ b/drivers/i2c/busses/i2c-xiic.c @@ -843,23 +843,11 @@ static int xiic_bus_busy(struct xiic_i2c *i2c) return (sr & XIIC_SR_BUS_BUSY_MASK) ? -EBUSY : 0; } -static int xiic_busy(struct xiic_i2c *i2c) +static int xiic_wait_not_busy(struct xiic_i2c *i2c) { int tries = 3; int err; - if (i2c->tx_msg || i2c->rx_msg) - return -EBUSY; - - /* In single master mode bus can only be busy, when in use by this - * driver. If the register indicates bus being busy for some reason we - * should ignore it, since bus will never be released and i2c will be - * stuck forever. - */ - if (i2c->singlemaster) { - return 0; - } - /* for instance if previous transfer was terminated due to TX error * it might be that the bus is on it's way to become available * give it at most 3 ms to wake @@ -1103,9 +1091,33 @@ static int xiic_start_xfer(struct xiic_i2c *i2c, struct i2c_msg *msgs, int num) mutex_lock(&i2c->lock); - ret = xiic_busy(i2c); - if (ret) + if (i2c->tx_msg || i2c->rx_msg) { + ret = -EBUSY; goto out; + } + + /* In single master mode bus can only be busy, when in use by this + * driver. If the register indicates bus being busy for some reason we + * should ignore it, since bus will never be released and i2c will be + * stuck forever. + */ + if (!i2c->singlemaster) { + ret = xiic_wait_not_busy(i2c); + if (ret) { + /* If the bus is stuck in a busy state, such as due to spurious low + * pulses on the bus causing a false start condition to be detected, + * then try to recover by re-initializing the controller and check + * again if the bus is still busy. + */ + dev_warn(i2c->adap.dev.parent, "I2C bus busy timeout, reinitializing\n"); + ret = xiic_reinit(i2c); + if (ret) + goto out; + ret = xiic_wait_not_busy(i2c); + if (ret) + goto out; + } + } i2c->tx_msg = msgs; i2c->rx_msg = NULL;