From patchwork Mon Nov 20 12:37:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 13461195 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E8218C197A0 for ; Mon, 20 Nov 2023 12:40:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=+y/mrrIV3IUSxEqJn/sha0E4lYXpsPq/Opa7SYqOuy0=; b=ma9jGcJ23hCAel VkHEgaP7GAwNVm3HCOcfl1kuUTvmc6WwDmChP67P5biXNDgakRGNouelguT6eF73dJdLbSu1jWygQ 05315AFYEAp219Pw3W+HC+7RKMFoGSgHpEo0fKApzSBbWiu2irQx6sAJ25V9Vemmw5dWOsrEB66eA KcHHlWzgH4W+4hGfekIjs83nurM39eKOI/1uB7f1y8BO9VPBwjeiT0xOUFTI4rPAXOmqZtmhKzqOy YrgAbinbDe6oF4q1FBI00EXmDQ1O6t5DqAMlCjyCeqT6H1XIct+L+WzPrTni0vvh1Kgqzz5hJAUHO BmW4x3FK/VCTRbOG/f2w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1r53Z7-00C1Sv-3B; Mon, 20 Nov 2023 12:39:50 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1r53XK-00C135-1G for linux-arm-kernel@bombadil.infradead.org; Mon, 20 Nov 2023 12:39:02 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Transfer-Encoding:MIME-Version :References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description; bh=DC2A2Kf7drVlD1T7L6d/GJRA5DOWD6tRdqjsifiEB8Y=; b=mNXVehKwyIo+R3QFGXSkLaEd9l ftwqNpAEM9/CE+SwfJt+Al/epPH5m13JyyId9ov6X16zlN2CH5P6FQ1tyX3r2H0mzDgoVqQXsUn0/ 2xxj9zVsSGKg/dC/4xSwpPSNrKu7qYOCRqOkRMr+18mWCN76fFOKtnxDzMG9K4NnqTEV6RuJiRDYz mVzdxpywil5rAzHISyU5bVDDweSv8ONNI9nO579QYwMFLKzrEg0OzJJjEHdYHHbIAguXAgN5Tknni UAGa7KL4TN1ZI/Bgs4SiVF5p9E+EWxHpdTFlQDpHo8su6gETVivcCAXzhyU1t+Myj5utBSjo0hnhr qe+s3XgA==; Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by desiato.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1r53XG-00AxJh-03 for linux-arm-kernel@lists.infradead.org; Mon, 20 Nov 2023 12:37:57 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 3CD3A6123F; Mon, 20 Nov 2023 12:37:49 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2501FC433AB; Mon, 20 Nov 2023 12:37:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1700483868; bh=MtPSu5LUzrRw8/ng+e1jkKKFUThsGpUNJoMyASnhWfA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=RjsG+u+QDN8i8hO3TFQZXzpmAuFAKd/GymB5Gkd3DoMumVX4KxHzfAYh3YgJUA3Qs HYtSmrqXkSar4Deed6v1XwbopUvhs3R/YcIh0EWTjz0eansREr0LuBiST34knSivwN 5L5mULkH0XHXDaN3JzXfIlZpUifViWtNh/tRd9BDIJz1fnlZdQ310z9n9QOefby2+z /F+nEJOS/Eq0Fwm/FbIKDeMNX3FvkekUKT5gDxIrjfGOW6aoNmVZ2if0dOodxK4flZ dnZ958qY8UXSk5O6LG65azPIx4wonLkC4pDc8koHTcUt7nCaYo3MmcDSq8HoLMsYuR HS7KrDEh0Jlgg== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1r53X8-00EjJv-0w; Mon, 20 Nov 2023 12:37:46 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev Cc: Catalin Marinas , Will Deacon , Mark Rutland , Ard Biesheuvel , James Morse , Suzuki K Poulose , Oliver Upton , Zenghui Yu Subject: [PATCH v2 11/13] arm64: Add MIDR-based overrides for ID_AA64MMFR4_EL1.E2H0 Date: Mon, 20 Nov 2023 12:37:19 +0000 Message-Id: <20231120123721.851738-12-maz@kernel.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231120123721.851738-1-maz@kernel.org> References: <20231120123721.851738-1-maz@kernel.org> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, catalin.marinas@arm.com, will@kernel.org, mark.rutland@arm.com, ardb@kernel.org, james.morse@arm.com, suzuki.poulose@arm.com, oliver.upton@linux.dev, yuzenghui@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231120_123754_343522_5D448EDD X-CRM114-Status: GOOD ( 11.83 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org None the Apple M1/M2 CPUs effectively implement E2H=0, and M2 doesn't correctly implement NV1=1 (the EL2 S1 PTW seems to barf on the nVHE format). Override ID_AA64MMFR4_EL1.E2H0 for these CPUs to reflect what they actually support. Signed-off-by: Marc Zyngier Reviewed-by: Suzuki K Poulose --- arch/arm64/kernel/idreg-override.c | 36 ++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm64/kernel/idreg-override.c b/arch/arm64/kernel/idreg-override.c index 57c145bf50b7..f7be459e5ff3 100644 --- a/arch/arm64/kernel/idreg-override.c +++ b/arch/arm64/kernel/idreg-override.c @@ -326,7 +326,43 @@ struct midr_override_data { const struct midr_range ranges[]; }; +static const struct midr_override_data e2h0_ni __initconst = { + /* + * These CPUs predate FEAT_E2H0, but have HCR_EL2.E2H RES1 + * anyway. + */ + .feature = "id_aa64mmfr4.e2h0=0xf", + .ranges = { + MIDR_ALL_VERSIONS(MIDR_APPLE_M1_ICESTORM), + MIDR_ALL_VERSIONS(MIDR_APPLE_M1_FIRESTORM), + MIDR_ALL_VERSIONS(MIDR_APPLE_M1_ICESTORM_PRO), + MIDR_ALL_VERSIONS(MIDR_APPLE_M1_FIRESTORM_PRO), + MIDR_ALL_VERSIONS(MIDR_APPLE_M1_ICESTORM_MAX), + MIDR_ALL_VERSIONS(MIDR_APPLE_M1_FIRESTORM_MAX), + {} + }, +}; + +static const struct midr_override_data e2h0_nv1_ni __initconst = { + /* + * These CPUs predate FEAT_E2H0, but have both HCR_EL2.E2H + * RES1 and a non-functional HCR_EL2.NV1. + */ + .feature = "id_aa64mmfr4.e2h0=0xe", + .ranges = { + MIDR_ALL_VERSIONS(MIDR_APPLE_M2_BLIZZARD), + MIDR_ALL_VERSIONS(MIDR_APPLE_M2_AVALANCHE), + MIDR_ALL_VERSIONS(MIDR_APPLE_M2_BLIZZARD_PRO), + MIDR_ALL_VERSIONS(MIDR_APPLE_M2_AVALANCHE_PRO), + MIDR_ALL_VERSIONS(MIDR_APPLE_M2_BLIZZARD_MAX), + MIDR_ALL_VERSIONS(MIDR_APPLE_M2_AVALANCHE_MAX), + {} + }, +}; + static const struct midr_override_data * const midr_ovr_data[] __initconst = { + &e2h0_ni, + &e2h0_nv1_ni, }; static void __init apply_midr_overrides(void)