| Message ID | 20231120123721.851738-13-maz@kernel.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: Add support for FEAT_E2H0, or lack thereof | expand |
On 20/11/2023 12:37, Marc Zyngier wrote: > We can now expose ID_AA64MMFR4_EL1 to guests, and let NV guests > understand that they cannot really switch HCR_EL2.E2H to 0 on > some platforms. > > Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> > --- > arch/arm64/kvm/nested.c | 4 ++++ > arch/arm64/kvm/sys_regs.c | 2 +- > 2 files changed, 5 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c > index 042695a210ce..3885f1c93979 100644 > --- a/arch/arm64/kvm/nested.c > +++ b/arch/arm64/kvm/nested.c > @@ -137,6 +137,10 @@ void access_nested_id_reg(struct kvm_vcpu *v, struct sys_reg_params *p, > val |= FIELD_PREP(NV_FTR(MMFR2, TTL), 0b0001); > break; > > + case SYS_ID_AA64MMFR4_EL1: > + val &= NV_FTR(MMFR4, E2H0); > + break; > + > case SYS_ID_AA64DFR0_EL1: > /* Only limited support for PMU, Debug, BPs and WPs */ > val &= (NV_FTR(DFR0, PMUVer) | > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > index 9f76f24b96f8..ff2e66f0bda1 100644 > --- a/arch/arm64/kvm/sys_regs.c > +++ b/arch/arm64/kvm/sys_regs.c > @@ -2197,7 +2197,7 @@ static const struct sys_reg_desc sys_reg_descs[] = { > ID_AA64MMFR2_EL1_NV | > ID_AA64MMFR2_EL1_CCIDX)), > ID_SANITISED(ID_AA64MMFR3_EL1), > - ID_UNALLOCATED(7,4), > + ID_SANITISED(ID_AA64MMFR4_EL1), > ID_UNALLOCATED(7,5), > ID_UNALLOCATED(7,6), > ID_UNALLOCATED(7,7),
diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c index 042695a210ce..3885f1c93979 100644 --- a/arch/arm64/kvm/nested.c +++ b/arch/arm64/kvm/nested.c @@ -137,6 +137,10 @@ void access_nested_id_reg(struct kvm_vcpu *v, struct sys_reg_params *p, val |= FIELD_PREP(NV_FTR(MMFR2, TTL), 0b0001); break; + case SYS_ID_AA64MMFR4_EL1: + val &= NV_FTR(MMFR4, E2H0); + break; + case SYS_ID_AA64DFR0_EL1: /* Only limited support for PMU, Debug, BPs and WPs */ val &= (NV_FTR(DFR0, PMUVer) | diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 9f76f24b96f8..ff2e66f0bda1 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -2197,7 +2197,7 @@ static const struct sys_reg_desc sys_reg_descs[] = { ID_AA64MMFR2_EL1_NV | ID_AA64MMFR2_EL1_CCIDX)), ID_SANITISED(ID_AA64MMFR3_EL1), - ID_UNALLOCATED(7,4), + ID_SANITISED(ID_AA64MMFR4_EL1), ID_UNALLOCATED(7,5), ID_UNALLOCATED(7,6), ID_UNALLOCATED(7,7),
We can now expose ID_AA64MMFR4_EL1 to guests, and let NV guests understand that they cannot really switch HCR_EL2.E2H to 0 on some platforms. Signed-off-by: Marc Zyngier <maz@kernel.org> --- arch/arm64/kvm/nested.c | 4 ++++ arch/arm64/kvm/sys_regs.c | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-)