From patchwork Mon Nov 27 11:45:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 13469430 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 66D9AC4167B for ; Mon, 27 Nov 2023 11:47:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=z7J0rSfUI1BYH0Lfj+cZlKwF0VXFNukonSwryfyMsHA=; b=pIhLVVVNmsCjCx BrFQxOwJZiddzW2UoZh2dl8h3xSiJuTVzN8gypaCw+5yc5X35axRnlN/2wE1nJTmEYL5o0+p7Xko9 QR2W+qJ4notT0UaegjHE8VgejThS7X0tOHePNW3+2v00rWJJ2j5ZyKerbFQuaCbxTvn/7pg492eNe JOPU9bHuO7keg4GF1AW4kY42lzA6xJ9B/UR+z2vL8lifqBxuubvnQdha+Kw4XKl5JIOC+JpdlYLXU U3WVWjP5B84jBJXKFVH9levecIzCo0oxMYoAB57XutMjCqsaoQntsMDNBjkwuK/h8eU0yPi9/JITW B0eSeDo5cNWO2xHjbD5g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1r7a4N-002IOM-0m; Mon, 27 Nov 2023 11:46:31 +0000 Received: from ams.source.kernel.org ([145.40.68.75]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1r7a43-002I63-1b for linux-arm-kernel@lists.infradead.org; Mon, 27 Nov 2023 11:46:13 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by ams.source.kernel.org (Postfix) with ESMTP id 1A0A2B83534; Mon, 27 Nov 2023 11:46:10 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 71D46C433C8; Mon, 27 Nov 2023 11:46:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1701085569; bh=Fvq0Qx5/5FcSO63oLeAsntiv8dxmQE9SUWOgpOd3RWY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TKw+rIBF5UboEDItj2MuJzY5ReJ7mbzOYXCH1OMkTtfSrwMnJHC8oh78PKe5kTOB9 j40JDprsKgINcyk5oLA6tSw6fQbjViwegUrfgohagbidQK8nPjknwbT+L8UXA7IanT ga/g9/xpwWw7gU09HSYoe9gTRZqaQzmILsdYntiSDn3YAcdXiLZMHmWSgh0vP0Fx8b PvFLOuHkiTtsoYbZkahTvYiXEz20zCkkTPKt0ya0+YesTf+LqKLvKYCB2O/T8JNrkY sH0UrrpbqrT/9iGYm54A8sUcC5BfEo1rSLRNrDsDoFNY2/ZZ1arwEJIx3pRCQBLYQP ucsh/SD2mE+NQ== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1r7a3y-00GleL-8o; Mon, 27 Nov 2023 11:46:07 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev Cc: Catalin Marinas , Will Deacon , Mark Rutland , Ard Biesheuvel , James Morse , Suzuki K Poulose , Oliver Upton , Zenghui Yu Subject: [PATCH v3 11/13] arm64: Add MIDR-based overrides for ID_AA64MMFR4_EL1.E2H0 Date: Mon, 27 Nov 2023 11:45:57 +0000 Message-Id: <20231127114559.990314-12-maz@kernel.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231127114559.990314-1-maz@kernel.org> References: <20231127114559.990314-1-maz@kernel.org> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, catalin.marinas@arm.com, will@kernel.org, mark.rutland@arm.com, ardb@kernel.org, james.morse@arm.com, suzuki.poulose@arm.com, oliver.upton@linux.dev, yuzenghui@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231127_034611_870372_889CC043 X-CRM114-Status: GOOD ( 11.93 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org None the Apple M1/M2 CPUs effectively implement E2H=0, and M2 doesn't correctly implement NV1=1 (the EL2 S1 PTW seems to barf on the nVHE format). Override ID_AA64MMFR4_EL1.E2H0 for these CPUs to reflect what they actually support. Reviewed-by: Suzuki K Poulose Signed-off-by: Marc Zyngier --- arch/arm64/kernel/idreg-override.c | 36 ++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm64/kernel/idreg-override.c b/arch/arm64/kernel/idreg-override.c index 57c145bf50b7..f7be459e5ff3 100644 --- a/arch/arm64/kernel/idreg-override.c +++ b/arch/arm64/kernel/idreg-override.c @@ -326,7 +326,43 @@ struct midr_override_data { const struct midr_range ranges[]; }; +static const struct midr_override_data e2h0_ni __initconst = { + /* + * These CPUs predate FEAT_E2H0, but have HCR_EL2.E2H RES1 + * anyway. + */ + .feature = "id_aa64mmfr4.e2h0=0xf", + .ranges = { + MIDR_ALL_VERSIONS(MIDR_APPLE_M1_ICESTORM), + MIDR_ALL_VERSIONS(MIDR_APPLE_M1_FIRESTORM), + MIDR_ALL_VERSIONS(MIDR_APPLE_M1_ICESTORM_PRO), + MIDR_ALL_VERSIONS(MIDR_APPLE_M1_FIRESTORM_PRO), + MIDR_ALL_VERSIONS(MIDR_APPLE_M1_ICESTORM_MAX), + MIDR_ALL_VERSIONS(MIDR_APPLE_M1_FIRESTORM_MAX), + {} + }, +}; + +static const struct midr_override_data e2h0_nv1_ni __initconst = { + /* + * These CPUs predate FEAT_E2H0, but have both HCR_EL2.E2H + * RES1 and a non-functional HCR_EL2.NV1. + */ + .feature = "id_aa64mmfr4.e2h0=0xe", + .ranges = { + MIDR_ALL_VERSIONS(MIDR_APPLE_M2_BLIZZARD), + MIDR_ALL_VERSIONS(MIDR_APPLE_M2_AVALANCHE), + MIDR_ALL_VERSIONS(MIDR_APPLE_M2_BLIZZARD_PRO), + MIDR_ALL_VERSIONS(MIDR_APPLE_M2_AVALANCHE_PRO), + MIDR_ALL_VERSIONS(MIDR_APPLE_M2_BLIZZARD_MAX), + MIDR_ALL_VERSIONS(MIDR_APPLE_M2_AVALANCHE_MAX), + {} + }, +}; + static const struct midr_override_data * const midr_ovr_data[] __initconst = { + &e2h0_ni, + &e2h0_nv1_ni, }; static void __init apply_midr_overrides(void)