| Message ID | 20231204143606.1806432-4-maz@kernel.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: Drop support for VPIPT i-cache policy | expand |
On 12/4/23 20:06, Marc Zyngier wrote: > We now have *two* values for CTR_EL0.L1Ip that are reserved. > Which makes things a bit awkward. In order to lift the ambiguity, > rename RESERVED (0b01) to RESERVED_AIVIVT, and VPIPT (0b00) to > RESERVED_VPIPT. > > This makes it clear which of these meant what, and I'm sure > archeologists will find it useful... > > Reviewed-by: Zenghui Yu <yuzenghui@huawei.com> > Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com> > --- > arch/arm64/tools/sysreg | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg > index 96cbeeab4eec..c5af75b23187 100644 > --- a/arch/arm64/tools/sysreg > +++ b/arch/arm64/tools/sysreg > @@ -2004,9 +2004,10 @@ Field 27:24 CWG > Field 23:20 ERG > Field 19:16 DminLine > Enum 15:14 L1Ip > - 0b00 VPIPT > + # This was named as VPIPT in the ARM but now documented as reserved > + 0b00 RESERVED_VPIPT > # This is named as AIVIVT in the ARM but documented as reserved > - 0b01 RESERVED > + 0b01 RESERVED_AIVIVT > 0b10 VIPT > 0b11 PIPT > EndEnum
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index 96cbeeab4eec..c5af75b23187 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -2004,9 +2004,10 @@ Field 27:24 CWG Field 23:20 ERG Field 19:16 DminLine Enum 15:14 L1Ip - 0b00 VPIPT + # This was named as VPIPT in the ARM but now documented as reserved + 0b00 RESERVED_VPIPT # This is named as AIVIVT in the ARM but documented as reserved - 0b01 RESERVED + 0b01 RESERVED_AIVIVT 0b10 VIPT 0b11 PIPT EndEnum