From patchwork Tue Dec 5 10:22:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fuad Tabba X-Patchwork-Id: 13479889 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 18544C10DCE for ; Tue, 5 Dec 2023 10:23:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:From:Subject:Message-ID: References:Mime-Version:In-Reply-To:Date:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=x6Hp0ApmpEZB4FMPjPilra3T8YQtdXsGFAprkojjCFo=; b=Jiyzr3up1Vqcl+0Ybe5UYvgKar UQwF0ovgIOGiP6QJJjfIaSwYaU2Cpa7S+yDmhG+79cS9NjX+4T4qm/8IsQnHmWVPYnKczTH8KnFvt ZLTjLkHh0lQJF72F1dMAh56uBdTlABB9lcLycWjZaZVwAYtXGLsRWqrzd452Eg2kGIam4AKOU6sKw zIhxmP5aWUoVgo+kSXYV01NoOBtn3j0wH1Yh6Xr8dd9x+0CwdeGaD9RlfUc/no+JF45HJ8DwDkNyH CxOunZ0hx5zfNLdTmjgulMCG16N5MqUpCAy/FWWcbyxaPxMv9lUQoZw2exo55gmxD8Ijyx+DbFP6G +1xwNuTg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rASa3-006xW7-2m; Tue, 05 Dec 2023 10:23:07 +0000 Received: from mail-yb1-xb49.google.com ([2607:f8b0:4864:20::b49]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rASZz-006xQz-30 for linux-arm-kernel@lists.infradead.org; Tue, 05 Dec 2023 10:23:05 +0000 Received: by mail-yb1-xb49.google.com with SMTP id 3f1490d57ef6-db98b9c0fceso461628276.1 for ; Tue, 05 Dec 2023 02:23:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1701771780; x=1702376580; darn=lists.infradead.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=KNy4G0m5CsZO0PVE02L10AoMnonCl62//5sk2193kL4=; b=fpc/rHqLYI/3AwSLYoj+H7GrAskwmMdJqhu3TOhNRHPVMS8HvoLoM/SPSKK9s+dKcV e1qQ+NUp94NUxeUJuKos/OP5gPU+THiDcYir96F7J8obzGdyB5wLT9AvFQhKShI12IfO vNogOf+obXCCPPwcSFddakaNj/3Eq2RMJg0u9g7/j6SlZ/rGLn6wJw2MUhcAV/WQQ+hy kTYkDY3CkMf52HSMMO+Tr2kBCOljWRCpjBu8jLyITtkkAR40ORDTZIPMdCuHkb2mb5j9 klUuGbwJkrqy2rNlfRKH1/KkHrQUSmZtYcRKNSzLhz6xlkzVIygAgcaR8rIJBasxdfbT 7B/A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1701771780; x=1702376580; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=KNy4G0m5CsZO0PVE02L10AoMnonCl62//5sk2193kL4=; b=f5M115y/AUx7PiWP3O1ng2YThMfeuak6iPFDFn92U+6DQWoyRu+rlh+1mNAUmYMM0k byp7wXcspWTPvlvlYPo6tyqxEq44mF9bFSMogFTrrlbmbIRQBzPDZ5H0mpVzczBQ4bm7 FwXSXYuS6RWGSMU+dQrtvlmGYXBt6MNcmA3I9D9ZTMskpTqAfgzuL9sSX22zr8hzAQFD 9DBwKIML9BWb4m6LyTTWnfvtrQ9VVX1hgZXdM3sFfIlyquNEFYwAgJiLsSrh6fikhVma HWJXQ4rv/sEKYjXd5kpB4EYTQ5kXiujiXIFuFMeQpTDcfD35VM0OFeyNRNQoTTL+Jnsl /Eug== X-Gm-Message-State: AOJu0Yx9pYzeuSplbkRO9K1v9s0Tr47LxhgrwWInUsZeM73vvwU9Ggd7 EJkknlbFz9yjL/OaFaBprOw/J7neeQ== X-Google-Smtp-Source: AGHT+IGA84W6+BmctaSHyOtZJKJ7ioMvvJ9dEcQAhOvOmohHsmNGlJO/KQGc97vOKqUco8GspSKDwhovZQ== X-Received: from fuad.c.googlers.com ([fda3:e722:ac3:cc00:28:9cb1:c0a8:1613]) (user=tabba job=sendgmr) by 2002:a25:d6d1:0:b0:db7:dce9:76d3 with SMTP id n200-20020a25d6d1000000b00db7dce976d3mr190013ybg.9.1701771780150; Tue, 05 Dec 2023 02:23:00 -0800 (PST) Date: Tue, 5 Dec 2023 10:22:46 +0000 In-Reply-To: <20231205102248.1915895-1-tabba@google.com> Mime-Version: 1.0 References: <20231205102248.1915895-1-tabba@google.com> X-Mailer: git-send-email 2.43.0.rc2.451.g8631bc7472-goog Message-ID: <20231205102248.1915895-5-tabba@google.com> Subject: [PATCH v1 4/6] KVM: arm64: Calculate FGT RES0 Bits From: Fuad Tabba To: kvmarm@lists.linux.dev Cc: maz@kernel.org, oliver.upton@linux.dev, james.morse@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, catalin.marinas@arm.com, will@kernel.org, eric.auger@redhat.com, jingzhangos@google.com, joey.gouly@arm.com, tabba@google.com, linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231205_022304_018614_02BDA63F X-CRM114-Status: GOOD ( 10.29 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org All FGT reserved bits are res0, and they are the ones remaining after accounting for all defined trap bits. Now that we have full coverage of the trap bits, calculate the res0 bits based on the other bits. No functional change intended. Signed-off-by: Fuad Tabba --- arch/arm64/include/asm/kvm_arm.h | 19 +++++++------------ arch/arm64/kvm/hyp/include/hyp/switch.h | 2 -- 2 files changed, 7 insertions(+), 14 deletions(-) diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h index b0dc3249d5cd..44bbbb4110d3 100644 --- a/arch/arm64/include/asm/kvm_arm.h +++ b/arch/arm64/include/asm/kvm_arm.h @@ -344,49 +344,44 @@ * Once we get to a point where the two describe the same thing, we'll * merge the definitions. One day. */ -#define __HFGRTR_EL2_RES0 BIT(51) #define __HFGRTR_EL2_MASK GENMASK(49, 0) #define __HFGRTR_EL2_nMASK (GENMASK(63, 52) | BIT(50)) +#define __HFGRTR_EL2_RES0 ~(__HFGRTR_EL2_MASK | __HFGRTR_EL2_nMASK) -#define __HFGWTR_EL2_RES0 (BIT(51) | BIT(46) | BIT(42) | BIT(40) | \ - BIT(28) | GENMASK(26, 25) | BIT(21) | BIT(18) | \ - GENMASK(15, 14) | GENMASK(10, 9) | BIT(2)) #define __HFGWTR_EL2_MASK (GENMASK(49, 47) | GENMASK(45, 43) | \ BIT(41) | GENMASK(39, 29) | BIT(27) | \ GENMASK(24, 22) | GENMASK(20, 19) | \ GENMASK(17, 16) | GENMASK(13, 11) | \ GENMASK(8, 3) | GENMASK(1, 0)) #define __HFGWTR_EL2_nMASK (GENMASK(63, 52) | BIT(50)) +#define __HFGWTR_EL2_RES0 ~(__HFGWTR_EL2_MASK | __HFGWTR_EL2_nMASK) -#define __HFGITR_EL2_RES0 (BIT(63) | BIT(61)) #define __HFGITR_EL2_MASK (BIT(62) | BIT(60) | GENMASK(54, 0)) #define __HFGITR_EL2_nMASK GENMASK(59, 55) +#define __HFGITR_EL2_RES0 ~(__HFGITR_EL2_MASK | __HFGITR_EL2_nMASK) -#define __HDFGRTR_EL2_RES0 (BIT(49) | BIT(42) | GENMASK(39, 38) | \ - GENMASK(21, 20) | BIT(8)) #define __HDFGRTR_EL2_MASK (BIT(63) | GENMASK(58, 50) | GENMASK(48, 43) | \ GENMASK(41, 40) | GENMASK(37, 22) | \ GENMASK(19, 9) | GENMASK(7, 0)) #define __HDFGRTR_EL2_nMASK GENMASK(62, 59) +#define __HDFGRTR_EL2_RES0 ~(__HDFGRTR_EL2_MASK | __HDFGRTR_EL2_nMASK) -#define __HDFGWTR_EL2_RES0 (BIT(63) | GENMASK(59, 58) | BIT(51) | BIT(47) | \ - BIT(43) | GENMASK(40, 38) | BIT(34) | BIT(30) | \ - BIT(22) | BIT(9) | BIT(6)) #define __HDFGWTR_EL2_MASK (GENMASK(57, 52) | GENMASK(50, 48) | \ GENMASK(46, 44) | GENMASK(42, 41) | \ GENMASK(37, 35) | GENMASK(33, 31) | \ GENMASK(29, 23) | GENMASK(21, 10) | \ GENMASK(8, 7) | GENMASK(5, 0)) #define __HDFGWTR_EL2_nMASK GENMASK(62, 60) +#define __HDFGWTR_EL2_RES0 ~(__HDFGWTR_EL2_MASK | __HDFGWTR_EL2_nMASK) -#define __HAFGRTR_EL2_RES0 (GENMASK(63, 50) | GENMASK(16, 5)) #define __HAFGRTR_EL2_MASK (GENMASK(49, 17) | GENMASK(4, 0)) #define __HAFGRTR_EL2_nMASK 0UL +#define __HAFGRTR_EL2_RES0 ~(__HAFGRTR_EL2_MASK | __HAFGRTR_EL2_nMASK) /* Similar definitions for HCRX_EL2 */ -#define __HCRX_EL2_RES0 (GENMASK(63, 25) | GENMASK(13, 12)) #define __HCRX_EL2_MASK (BIT(6)) #define __HCRX_EL2_nMASK (GENMASK(24, 14) | GENMASK(11, 7) | GENMASK(5, 0)) +#define __HCRX_EL2_RES0 ~(__HCRX_EL2_MASK | __HCRX_EL2_nMASK) /* Hyp Prefetch Fault Address Register (HPFAR/HDFAR) */ #define HPFAR_MASK (~UL(0xf)) diff --git a/arch/arm64/kvm/hyp/include/hyp/switch.h b/arch/arm64/kvm/hyp/include/hyp/switch.h index 2c6e8cbbd081..bf045dc32996 100644 --- a/arch/arm64/kvm/hyp/include/hyp/switch.h +++ b/arch/arm64/kvm/hyp/include/hyp/switch.h @@ -86,8 +86,6 @@ static inline void __activate_traps_fpsimd32(struct kvm_vcpu *vcpu) #define CHECK_FGT_MASKS(reg) \ do { \ BUILD_BUG_ON((__ ## reg ## _MASK) & (__ ## reg ## _nMASK)); \ - BUILD_BUG_ON(~((__ ## reg ## _RES0) ^ (__ ## reg ## _MASK) ^ \ - (__ ## reg ## _nMASK))); \ } while(0) static inline void __activate_traps_hfgxtr(struct kvm_vcpu *vcpu)