From patchwork Wed Dec 6 10:04:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fuad Tabba X-Patchwork-Id: 13481343 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D529EC10DC1 for ; Wed, 6 Dec 2023 10:05:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:From:Subject:Message-ID: References:Mime-Version:In-Reply-To:Date:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=15/dDaf6hx4GHWjhkCwgA63XKdwUMHYWqlo6UNM+6Ss=; b=VooRxUZzOUqB1QrqRVINN+3rD9 oVHDMS4CKROXMOdCOaZseXAigFYlXDztRyzXbAt06P824k70Q1WB/r45yfv8AGwNjXpI+GhJssXjF S0XOJe1wQaHVnFvq9RU7X/+k9jZZ+qXSvk5QSJE1C0m5+/wbi0WEZ/3IfVfP+gzOWxQkQenLB7J9U N38cOrXdLrvQMRMO5DjDEQ0AaWPf+mnlGSYq+7HP3ob0opw3TxbRqgwwJPe63sV15umvSWbUeUsCq iSxLavxC2UBBfZ6Bvk+zDtf/XByNXjccCRVf2Rc4nZ/ht7KxhbEffkwEoCz3lmF/37uNLEZfk0C6C 2ZuS5EUQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rAomM-009d4q-03; Wed, 06 Dec 2023 10:05:18 +0000 Received: from mail-wr1-x449.google.com ([2a00:1450:4864:20::449]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rAomI-009d3I-0R for linux-arm-kernel@lists.infradead.org; Wed, 06 Dec 2023 10:05:15 +0000 Received: by mail-wr1-x449.google.com with SMTP id ffacd0b85a97d-3334b472196so510456f8f.1 for ; Wed, 06 Dec 2023 02:05:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1701857112; x=1702461912; darn=lists.infradead.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=4emEZgCht3g7YAgleMBhSuxLFdgddUkyW+dgth2uuoc=; b=aiq2AQO5XNuPqH0/Lhok0B+c4DUHddnGWbnvcTVpijM1IvLLrHOXV/oxx3T/uOHE40 RqmudgdqzTgP6QzgAGq+2NXBYdBaplFc/bga733p/wTEz1biZKXKaq19XhfO7qdcIa2a A74jY9y7dhIOlNUo1QFqDhQwkteCJSoj1PGjEViR9mWIW8GEf6yfB8Wxbh8On67WlYBN beNRxrCh1mUUJzPs7eTGu8rVVlR0C9nyTTA73VjocXkxZsM46KJGt72uhwKpQFgP30pT +MLcsE5cmDseQuEl4AjXW7VNvCH7d0EcoFnbKfZcv8rU48KWqgT1MBy9flyt1fbHaRcq z1aA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1701857112; x=1702461912; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=4emEZgCht3g7YAgleMBhSuxLFdgddUkyW+dgth2uuoc=; b=GvM48K4zeHU+rF1uZ6ciZVeh0ZwM2eNtbkUrLfhrQ2F26g77xAObjLR3UHBjVLyUwe CY2Y0wW1pZRX5Ft8ufpjvuZbma6AlFVXCDhsTPKroBIArVig4rFx/Cb2WZj2C77Oji9a sWXzTIYtlW4m0yrbQq+wYaRywv2kIKslR5hneNFbJUuVFjjQ61fQsSerbO3KjFNF1Lpv 4QlKGFpBLV9Bwhte4Zfd12kqnsBCjrfjPiuT0bHIzKATmmZD7hJDbh54qhWh74hQjnXE nABmEwDhD4Bsx9JcCh4tplQeI9TZABoS7ObPP4LMOzESkHELpXJ5bU8SU/6mbPfjheaV Bdlw== X-Gm-Message-State: AOJu0Yxu+wLzTsBymugMze1/8AyyrNTVhUXlJHRrP1E6dxVSiulmLd0q 9BNJGRPXFWqOLgf+I1urm/sV4Wqx0A== X-Google-Smtp-Source: AGHT+IEv+1m5kkwwlrBEnwaIOLyd7g2RxSvIRGBWo9YXHGk+nCbTeViePGtmzBdh+c5B8e2yspcPiPQNVQ== X-Received: from fuad.c.googlers.com ([fda3:e722:ac3:cc00:28:9cb1:c0a8:1613]) (user=tabba job=sendgmr) by 2002:adf:b613:0:b0:333:6374:9da7 with SMTP id f19-20020adfb613000000b0033363749da7mr2962wre.13.1701857112375; Wed, 06 Dec 2023 02:05:12 -0800 (PST) Date: Wed, 6 Dec 2023 10:04:53 +0000 In-Reply-To: <20231206100503.564090-1-tabba@google.com> Mime-Version: 1.0 References: <20231206100503.564090-1-tabba@google.com> X-Mailer: git-send-email 2.43.0.rc2.451.g8631bc7472-goog Message-ID: <20231206100503.564090-4-tabba@google.com> Subject: [PATCH v2 03/12] KVM: arm64: Add latest HFGITR_EL2 FGT entries to nested virt From: Fuad Tabba To: kvmarm@lists.linux.dev Cc: maz@kernel.org, oliver.upton@linux.dev, james.morse@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, catalin.marinas@arm.com, will@kernel.org, eric.auger@redhat.com, jingzhangos@google.com, joey.gouly@arm.com, tabba@google.com, linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231206_020514_177980_9434504E X-CRM114-Status: GOOD ( 11.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add the missing nested virt FGT table entries HFGITR_EL2. Based on the 2023-09 Arm Architecture System Registers xml specification [*]. Add the missing field definitions as well, both to generate the correct RES0 mask and to be able to toggle their FGT bits. Also adds definitions of some of the missing system registers and instructions, which can be trapped by the FGT bits. [*] https://developer.arm.com/downloads/-/exploration-tools Signed-off-by: Fuad Tabba Reviewed-by: Mark Brown --- arch/arm64/include/asm/sysreg.h | 7 +++++++ arch/arm64/kvm/emulate-nested.c | 5 +++++ arch/arm64/tools/sysreg | 4 +++- 3 files changed, 15 insertions(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 7b469b3ac1f9..5892f9f1b541 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -658,6 +658,7 @@ #define OP_AT_S1E0W sys_insn(AT_Op0, 0, AT_CRn, 8, 3) #define OP_AT_S1E1RP sys_insn(AT_Op0, 0, AT_CRn, 9, 0) #define OP_AT_S1E1WP sys_insn(AT_Op0, 0, AT_CRn, 9, 1) +#define OP_AT_S1E1A sys_insn(AT_Op0, 0, AT_CRn, 9, 2) #define OP_AT_S1E2R sys_insn(AT_Op0, 4, AT_CRn, 8, 0) #define OP_AT_S1E2W sys_insn(AT_Op0, 4, AT_CRn, 8, 1) #define OP_AT_S12E1R sys_insn(AT_Op0, 4, AT_CRn, 8, 4) @@ -794,10 +795,16 @@ #define OP_TLBI_VMALLS12E1NXS sys_insn(1, 4, 9, 7, 6) /* Misc instructions */ +#define OP_GCSPUSHX sys_insn(1, 0, 7, 7, 4) +#define OP_GCSPOPCX sys_insn(1, 0, 7, 7, 5) +#define OP_GCSPOPX sys_insn(1, 0, 7, 7, 6) +#define OP_GCSPUSHM sys_insn(1, 3, 7, 7, 0) + #define OP_BRB_IALL sys_insn(1, 1, 7, 2, 4) #define OP_BRB_INJ sys_insn(1, 1, 7, 2, 5) #define OP_CFP_RCTX sys_insn(1, 3, 7, 3, 4) #define OP_DVP_RCTX sys_insn(1, 3, 7, 3, 5) +#define OP_COSP_RCTX sys_insn(1, 3, 7, 3, 6) #define OP_CPP_RCTX sys_insn(1, 3, 7, 3, 7) /* Common SCTLR_ELx flags. */ diff --git a/arch/arm64/kvm/emulate-nested.c b/arch/arm64/kvm/emulate-nested.c index 8b473a1bbc11..89901550db34 100644 --- a/arch/arm64/kvm/emulate-nested.c +++ b/arch/arm64/kvm/emulate-nested.c @@ -1117,6 +1117,11 @@ static const struct encoding_to_trap_config encoding_to_fgt[] __initconst = { SR_FGT(SYS_AFSR1_EL1, HFGxTR, AFSR1_EL1, 1), SR_FGT(SYS_AFSR0_EL1, HFGxTR, AFSR0_EL1, 1), /* HFGITR_EL2 */ + SR_FGT(OP_AT_S1E1A, HFGITR, ATS1E1A, 1), + SR_FGT(OP_COSP_RCTX, HFGITR, COSPRCTX, 1), + SR_FGT(OP_GCSPUSHX, HFGITR, nGCSEPP, 0), + SR_FGT(OP_GCSPOPX, HFGITR, nGCSEPP, 0), + SR_FGT(OP_GCSPUSHM, HFGITR, nGCSPUSHM_EL1, 0), SR_FGT(OP_BRB_IALL, HFGITR, nBRBIALL, 0), SR_FGT(OP_BRB_INJ, HFGITR, nBRBINJ, 0), SR_FGT(SYS_DC_CVAC, HFGITR, DCCVAC, 1), diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index c6cc8f2396e6..61cc3bcfc3fa 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -2102,7 +2102,9 @@ Fields HFGxTR_EL2 EndSysreg Sysreg HFGITR_EL2 3 4 1 1 6 -Res0 63:61 +Res0 63 +Field 62 ATS1E1A +Res0 61 Field 60 COSPRCTX Field 59 nGCSEPP Field 58 nGCSSTR_EL1