diff mbox series

[2/4] arm64: dts: imx8ulp-evk: enable usb nodes

Message ID 20231214112442.2412079-2-xu.yang_2@nxp.com (mailing list archive)
State New, archived
Headers show
Series [1/4] arm64: dts: imx8ulp: add usb nodes | expand

Commit Message

Xu Yang Dec. 14, 2023, 11:24 a.m. UTC
Enable 2 USB nodes on i.MX8ULP evk board.

Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8ulp-evk.dts | 54 +++++++++++++++++++
 1 file changed, 54 insertions(+)

Comments

Fabio Estevam Dec. 14, 2023, 11:30 a.m. UTC | #1
On Thu, Dec 14, 2023 at 8:19 AM Xu Yang <xu.yang_2@nxp.com> wrote:

> +&usbphy1 {
> +       status = "okay";
> +       fsl,tx-d-cal = <110>;

Place status as the last property.

> +&usbphy2 {
> +       status = "okay";
> +       fsl,tx-d-cal = <110>;

Place status as the last property.

> +};
> +
> +&usbmisc2 {
> +       status = "okay";
> +};
> +
>  &usdhc0 {
>         pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
>         pinctrl-0 = <&pinctrl_usdhc0>;
> @@ -224,6 +264,20 @@ MX8ULP_PAD_PTE13__LPI2C7_SDA       0x20
>                 >;
>         };
>
> +       pinctrl_otgid1: usb1grp {

pinctrl_ubs1: usb1grp

> +               fsl,pins = <
> +                       MX8ULP_PAD_PTF2__USB0_ID        0x10003
> +                       MX8ULP_PAD_PTF4__USB0_OC        0x10003
> +               >;
> +       };
> +
> +       pinctrl_otgid2: usb2grp {

pinctrl_usb2: usb2grp
Fabio Estevam Dec. 14, 2023, 11:58 a.m. UTC | #2
On Thu, Dec 14, 2023 at 8:19 AM Xu Yang <xu.yang_2@nxp.com> wrote:
>
> Enable 2 USB nodes on i.MX8ULP evk board.

imx8ulp-evk schematics show two PTN5150 and two USB Type-C connectors.

Why are they not represented in the devicetree?
Xu Yang Dec. 14, 2023, 12:44 p.m. UTC | #3
Hi Fabio,

> 
> On Thu, Dec 14, 2023 at 8:19 AM Xu Yang <xu.yang_2@nxp.com> wrote:
> 
> > +&usbphy1 {
> > +       status = "okay";
> > +       fsl,tx-d-cal = <110>;
> 
> Place status as the last property.

Okay.

> 
> > +&usbphy2 {
> > +       status = "okay";
> > +       fsl,tx-d-cal = <110>;
> 
> Place status as the last property.

Okay.

> 
> > +};
> > +
> > +&usbmisc2 {
> > +       status = "okay";
> > +};
> > +
> >  &usdhc0 {
> >         pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
> >         pinctrl-0 = <&pinctrl_usdhc0>;
> > @@ -224,6 +264,20 @@ MX8ULP_PAD_PTE13__LPI2C7_SDA       0x20
> >                 >;
> >         };
> >
> > +       pinctrl_otgid1: usb1grp {
> 
> pinctrl_ubs1: usb1grp

Okay.

> 
> > +               fsl,pins = <
> > +                       MX8ULP_PAD_PTF2__USB0_ID        0x10003
> > +                       MX8ULP_PAD_PTF4__USB0_OC        0x10003
> > +               >;
> > +       };
> > +
> > +       pinctrl_otgid2: usb2grp {
> 
> pinctrl_usb2: usb2grp

Okay.
Xu Yang Dec. 14, 2023, 12:50 p.m. UTC | #4
Hi Fabio,

> 
> On Thu, Dec 14, 2023 at 8:19 AM Xu Yang <xu.yang_2@nxp.com> wrote:
> >
> > Enable 2 USB nodes on i.MX8ULP evk board.
> 
> imx8ulp-evk schematics show two PTN5150 and two USB Type-C connectors.
> 
> Why are they not represented in the devicetree?

PTN5150 can work autonomously for most of the basic functions.
I don’t see a need to enable driver for it now.

Thanks,
Xu Yang
Fabio Estevam Dec. 14, 2023, 1:15 p.m. UTC | #5
On Thu, Dec 14, 2023 at 9:50 AM Xu Yang <xu.yang_2@nxp.com> wrote:

> PTN5150 can work autonomously for most of the basic functions.
> I don’t see a need to enable driver for it now.

We are talking about devicetree here, not driver.

If the PTN5150 is present on the board, then just represent it in the
devicetree.
Xu Yang Dec. 15, 2023, 1:56 a.m. UTC | #6
Hi Fabio,

> 
> On Thu, Dec 14, 2023 at 9:50 AM Xu Yang <xu.yang_2@nxp.com> wrote:
> 
> > PTN5150 can work autonomously for most of the basic functions.
> > I don’t see a need to enable driver for it now.
> 
> We are talking about devicetree here, not driver.
> 
> If the PTN5150 is present on the board, then just represent it in the
> devicetree.

Understood. Will consider this in v2.

Thanks,
Xu Yang
Jun Li Dec. 18, 2023, 11:56 a.m. UTC | #7
Hi Fabio,

> -----邮件原件-----
> 发件人: Fabio Estevam <festevam@gmail.com>
> 发送时间: 2023年12月14日 21:15
> 收件人: Xu Yang <xu.yang_2@nxp.com>
> 抄送: robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org;
> conor+dt@kernel.org; shawnguo@kernel.org; s.hauer@pengutronix.de;
> kernel@pengutronix.de; dl-linux-imx <linux-imx@nxp.com>;
> devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org
> 主题: Re: [EXT] Re: [PATCH 2/4] arm64: dts: imx8ulp-evk: enable usb nodes
> 
> On Thu, Dec 14, 2023 at 9:50 AM Xu Yang <xu.yang_2@nxp.com> wrote:
> 
> > PTN5150 can work autonomously for most of the basic functions.
> > I don’t see a need to enable driver for it now.
> 
> We are talking about devicetree here, not driver.
> 
> If the PTN5150 is present on the board, then just represent it in the
> devicetree.

If we do not need its driver(either SW control or pass any information) for
PTN5150, what's the point to present it in device tree? Another reason
is current PTN5150 driver is through extcon, not type-c, so enable it can
not get benefit of type-C subsystem.

Thanks
Li Jun
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
index 69dd8e31027c..08fadfe47785 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
@@ -135,6 +135,46 @@  pcal6408: gpio@21 {
 	};
 };
 
+&usbotg1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_otgid1>;
+	dr_mode = "otg";
+	hnp-disable;
+	srp-disable;
+	adp-disable;
+	over-current-active-low;
+	status = "okay";
+};
+
+&usbphy1 {
+	status = "okay";
+	fsl,tx-d-cal = <110>;
+};
+
+&usbmisc1 {
+	status = "okay";
+};
+
+&usbotg2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_otgid2>;
+	dr_mode = "otg";
+	hnp-disable;
+	srp-disable;
+	adp-disable;
+	over-current-active-low;
+	status = "okay";
+};
+
+&usbphy2 {
+	status = "okay";
+	fsl,tx-d-cal = <110>;
+};
+
+&usbmisc2 {
+	status = "okay";
+};
+
 &usdhc0 {
 	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
 	pinctrl-0 = <&pinctrl_usdhc0>;
@@ -224,6 +264,20 @@  MX8ULP_PAD_PTE13__LPI2C7_SDA	0x20
 		>;
 	};
 
+	pinctrl_otgid1: usb1grp {
+		fsl,pins = <
+			MX8ULP_PAD_PTF2__USB0_ID	0x10003
+			MX8ULP_PAD_PTF4__USB0_OC	0x10003
+		>;
+	};
+
+	pinctrl_otgid2: usb2grp {
+		fsl,pins = <
+			MX8ULP_PAD_PTD23__USB1_ID	0x10003
+			MX8ULP_PAD_PTF6__USB1_OC	0x10003
+		>;
+	};
+
 	pinctrl_usdhc0: usdhc0grp {
 		fsl,pins = <
 			MX8ULP_PAD_PTD1__SDHC0_CMD	0x3