| Message ID | 20231214112442.2412079-3-xu.yang_2@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/4] arm64: dts: imx8ulp: add usb nodes | expand |
Hi, thanks for the patch. Am Donnerstag, 14. Dezember 2023, 12:24:41 CET schrieb Xu Yang: > There are 2 USB controllers on i.MX93. Add them. > > Signed-off-by: Xu Yang <xu.yang_2@nxp.com> > --- > arch/arm64/boot/dts/freescale/imx93.dtsi | 58 ++++++++++++++++++++++++ > 1 file changed, 58 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi > b/arch/arm64/boot/dts/freescale/imx93.dtsi index 34c0540276d1..bcf4861cfede > 100644 > --- a/arch/arm64/boot/dts/freescale/imx93.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi > @@ -171,6 +171,20 @@ cm33: remoteproc-cm33 { > status = "disabled"; > }; > > + usbphynop1: usbphynop1 { > + #phy-cells = <0>; > + compatible = "usb-nop-xceiv"; compatible first. > + clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>; > + clock-names = "main_clk"; > + }; > + > + usbphynop2: usbphynop2 { > + #phy-cells = <0>; > + compatible = "usb-nop-xceiv"; compatible first. > + clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>; > + clock-names = "main_clk"; > + }; > + > soc@0 { > compatible = "simple-bus"; > #address-cells = <1>; > @@ -1059,5 +1073,49 @@ ddr-pmu@4e300dc0 { > reg = <0x4e300dc0 0x200>; > interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; > }; > + > + usbotg1: usb@4c100000 { > + compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb", "fsl,imx27-usb"; > + reg = <0x4c100000 0x200>; > + interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>, > + <&clk IMX93_CLK_HSIO_32K_GATE>; > + clock-names = "usb_ctrl_root_clk", "usb_wakeup_clk"; drivers/usb/chipidea/ci_hdrc_imx.c uses 3 clocks: "ipg", "ahb" and "per", see imx_get_clks(). How is this supposed to work? > + assigned-clocks = <&clk IMX93_CLK_HSIO>; > + assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>; > + assigned-clock-rates = <133000000>; > + fsl,usbphy = <&usbphynop1>; > + fsl,usbmisc = <&usbmisc1 0>; > + status = "disabled"; > + }; > + > + usbmisc1: usbmisc@4c100200 { > + compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d- usbmisc", > + "fsl,imx6q-usbmisc"; This means you are compatible to fsl,imx7d-usbmisc. Which means you use register MX7D_USB_OTG_PHY_STATUS in USB misc (USBNC). But i.MX93 RM Rev. 2 (04/2023) lacks this and other registers. > + #index-cells = <1>; > + reg = <0x4c100200 0x200>; reg after compatible. > + }; > + > + usbotg2: usb@4c200000 { > + compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb", "fsl,imx27-usb"; > + reg = <0x4c200000 0x200>; > + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>, > + <&clk IMX93_CLK_HSIO_32K_GATE>; > + clock-names = "usb_ctrl_root_clk", "usb_wakeup_clk"; The same as for usbotg1 applies here. > + assigned-clocks = <&clk IMX93_CLK_HSIO>; > + assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>; > + assigned-clock-rates = <133000000>; > + fsl,usbphy = <&usbphynop2>; > + fsl,usbmisc = <&usbmisc2 0>; > + status = "disabled"; > + }; > + > + usbmisc2: usbmisc@4c200200 { > + compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d- usbmisc", > + "fsl,imx6q-usbmisc"; > + #index-cells = <1>; > + reg = <0x4c200200 0x200>; The same as for usbmisc1 applies here. > + }; > }; > }; Best regards, Alexander
Hi Alexander, > > Hi, > > thanks for the patch. > > Am Donnerstag, 14. Dezember 2023, 12:24:41 CET schrieb Xu Yang: > > There are 2 USB controllers on i.MX93. Add them. > > > > Signed-off-by: Xu Yang <xu.yang_2@nxp.com> > > --- > > arch/arm64/boot/dts/freescale/imx93.dtsi | 58 ++++++++++++++++++++++++ > > 1 file changed, 58 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi > > b/arch/arm64/boot/dts/freescale/imx93.dtsi index 34c0540276d1..bcf4861cfede > > 100644 > > --- a/arch/arm64/boot/dts/freescale/imx93.dtsi > > +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi > > @@ -171,6 +171,20 @@ cm33: remoteproc-cm33 { > > status = "disabled"; > > }; > > > > + usbphynop1: usbphynop1 { > > + #phy-cells = <0>; > > + compatible = "usb-nop-xceiv"; > > compatible first. Okay. > > > + clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>; > > + clock-names = "main_clk"; > > + }; > > + > > + usbphynop2: usbphynop2 { > > + #phy-cells = <0>; > > + compatible = "usb-nop-xceiv"; > > compatible first. Okay. > > > + clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>; > > + clock-names = "main_clk"; > > + }; > > + > > soc@0 { > > compatible = "simple-bus"; > > #address-cells = <1>; > > @@ -1059,5 +1073,49 @@ ddr-pmu@4e300dc0 { > > reg = <0x4e300dc0 0x200>; > > interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; > > }; > > + > > + usbotg1: usb@4c100000 { > > + compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb", > "fsl,imx27-usb"; > > + reg = <0x4c100000 0x200>; > > + interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>, > > + <&clk IMX93_CLK_HSIO_32K_GATE>; > > + clock-names = "usb_ctrl_root_clk", > "usb_wakeup_clk"; > > drivers/usb/chipidea/ci_hdrc_imx.c uses 3 clocks: "ipg", "ahb" and "per", see > imx_get_clks(). How is this supposed to work? I have sent another patch to get this clock. https://lore.kernel.org/all/20231214112622.2412321-1-xu.yang_2@nxp.com/ > > > + assigned-clocks = <&clk IMX93_CLK_HSIO>; > > + assigned-clock-parents = <&clk > IMX93_CLK_SYS_PLL_PFD1_DIV2>; > > + assigned-clock-rates = <133000000>; > > + fsl,usbphy = <&usbphynop1>; > > + fsl,usbmisc = <&usbmisc1 0>; > > + status = "disabled"; > > + }; > > + > > + usbmisc1: usbmisc@4c100200 { > > + compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d- > usbmisc", > > + "fsl,imx6q-usbmisc"; > > This means you are compatible to fsl,imx7d-usbmisc. Which means you use > register MX7D_USB_OTG_PHY_STATUS in USB misc (USBNC). But i.MX93 RM Rev. 2 > (04/2023) lacks this and other registers. Some registers in USBNC are not shown. The internal RM has these registers. > > > + #index-cells = <1>; > > + reg = <0x4c100200 0x200>; > > reg after compatible. Okay. > > > + }; > > + > > + usbotg2: usb@4c200000 { > > + compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb", > "fsl,imx27-usb"; > > + reg = <0x4c200000 0x200>; > > + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>, > > + <&clk IMX93_CLK_HSIO_32K_GATE>; > > + clock-names = "usb_ctrl_root_clk", > "usb_wakeup_clk"; > > The same as for usbotg1 applies here. Okay. > > > + assigned-clocks = <&clk IMX93_CLK_HSIO>; > > + assigned-clock-parents = <&clk > IMX93_CLK_SYS_PLL_PFD1_DIV2>; > > + assigned-clock-rates = <133000000>; > > + fsl,usbphy = <&usbphynop2>; > > + fsl,usbmisc = <&usbmisc2 0>; > > + status = "disabled"; > > + }; > > + > > + usbmisc2: usbmisc@4c200200 { > > + compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d- > usbmisc", > > + "fsl,imx6q-usbmisc"; > > + #index-cells = <1>; > > + reg = <0x4c200200 0x200>; > > The same as for usbmisc1 applies here. Okay. > > > + }; > > }; > > }; > > Best regards, > Alexander > > -- > TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany > Amtsgericht München, HRB 105018 > Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider > http://www.tq-/ > group.com%2F&data=05%7C02%7Cxu.yang_2%40nxp.com%7C10ff5a35f53f4047ae1d08dbfca99c38%7C686ea1d3bc2b4c6fa > 92cd99c5c301635%7C0%7C0%7C638381577622080432%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2 > luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=VlpRPcnJTmywfSamaGB1Ev8aPN2Hi596VbbRNGXF > yis%3D&reserved=0 >
Hi, Am Freitag, 15. Dezember 2023, 03:12:43 CET schrieb Xu Yang: > Hi Alexander, > > > Hi, > > > > thanks for the patch. > > > > Am Donnerstag, 14. Dezember 2023, 12:24:41 CET schrieb Xu Yang: > > > There are 2 USB controllers on i.MX93. Add them. > > > > > > Signed-off-by: Xu Yang <xu.yang_2@nxp.com> > > > --- > > > > > > arch/arm64/boot/dts/freescale/imx93.dtsi | 58 ++++++++++++++++++++++++ > > > 1 file changed, 58 insertions(+) > > > > > > diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi > > > b/arch/arm64/boot/dts/freescale/imx93.dtsi index > > > 34c0540276d1..bcf4861cfede > > > 100644 > > > --- a/arch/arm64/boot/dts/freescale/imx93.dtsi > > > +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi > > > @@ -171,6 +171,20 @@ cm33: remoteproc-cm33 { > > > > > > status = "disabled"; > > > > > > }; > > > > > > + usbphynop1: usbphynop1 { > > > + #phy-cells = <0>; > > > + compatible = "usb-nop-xceiv"; > > > > compatible first. > > Okay. > > > > + clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>; > > > + clock-names = "main_clk"; > > > + }; > > > + > > > + usbphynop2: usbphynop2 { > > > + #phy-cells = <0>; > > > + compatible = "usb-nop-xceiv"; > > > > compatible first. > > Okay. > > > > + clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>; > > > + clock-names = "main_clk"; > > > + }; > > > + > > > > > > soc@0 { > > > > > > compatible = "simple-bus"; > > > #address-cells = <1>; > > > > > > @@ -1059,5 +1073,49 @@ ddr-pmu@4e300dc0 { > > > > > > reg = <0x4e300dc0 0x200>; > > > interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; > > > > > > }; > > > > > > + > > > + usbotg1: usb@4c100000 { > > > + compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb", > > > > "fsl,imx27-usb"; > > > > > + reg = <0x4c100000 0x200>; > > > + interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; > > > + clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>, > > > + <&clk IMX93_CLK_HSIO_32K_GATE>; > > > + clock-names = "usb_ctrl_root_clk", > > > > "usb_wakeup_clk"; > > > > drivers/usb/chipidea/ci_hdrc_imx.c uses 3 clocks: "ipg", "ahb" and "per", > > see imx_get_clks(). How is this supposed to work? > > I have sent another patch to get this clock. > https://lore.kernel.org/all/20231214112622.2412321-1-xu.yang_2@nxp.com/ Okay, but that adds another clock which is not mentioned in Documentation/ devicetree/bindings/usb/ci-hdrc-usb2.yaml at all. I guess some compatible- specific constraints regarding number of clocks should be added. Best regards, Alexander > > > > + assigned-clocks = <&clk IMX93_CLK_HSIO>; > > > + assigned-clock-parents = <&clk > > > > IMX93_CLK_SYS_PLL_PFD1_DIV2>; > > > > > + assigned-clock-rates = <133000000>; > > > + fsl,usbphy = <&usbphynop1>; > > > + fsl,usbmisc = <&usbmisc1 0>; > > > + status = "disabled"; > > > + }; > > > + > > > + usbmisc1: usbmisc@4c100200 { > > > + compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d- > > > > usbmisc", > > > > > + "fsl,imx6q-usbmisc"; > > > > This means you are compatible to fsl,imx7d-usbmisc. Which means you use > > register MX7D_USB_OTG_PHY_STATUS in USB misc (USBNC). But i.MX93 RM Rev. 2 > > (04/2023) lacks this and other registers. > > Some registers in USBNC are not shown. The internal RM has these registers. > > > > + #index-cells = <1>; > > > + reg = <0x4c100200 0x200>; > > > > reg after compatible. > > Okay. > > > > + }; > > > + > > > + usbotg2: usb@4c200000 { > > > + compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb", > > > > "fsl,imx27-usb"; > > > > > + reg = <0x4c200000 0x200>; > > > + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; > > > + clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>, > > > + <&clk IMX93_CLK_HSIO_32K_GATE>; > > > + clock-names = "usb_ctrl_root_clk", > > > > "usb_wakeup_clk"; > > > > The same as for usbotg1 applies here. > > Okay. > > > > + assigned-clocks = <&clk IMX93_CLK_HSIO>; > > > + assigned-clock-parents = <&clk > > > > IMX93_CLK_SYS_PLL_PFD1_DIV2>; > > > > > + assigned-clock-rates = <133000000>; > > > + fsl,usbphy = <&usbphynop2>; > > > + fsl,usbmisc = <&usbmisc2 0>; > > > + status = "disabled"; > > > + }; > > > + > > > + usbmisc2: usbmisc@4c200200 { > > > + compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d- > > > > usbmisc", > > > > > + "fsl,imx6q-usbmisc"; > > > + #index-cells = <1>; > > > + reg = <0x4c200200 0x200>; > > > > The same as for usbmisc1 applies here. > > Okay. > > > > + }; > > > > > > }; > > > > > > }; > > > > Best regards, > > Alexander > > > > -- > > TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany > > Amtsgericht München, HRB 105018 > > Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider > > http://www.tq-/ > > group.com%2F&data=05%7C02%7Cxu.yang_2%40nxp.com%7C10ff5a35f53f4047ae1d08db > > fca99c38%7C686ea1d3bc2b4c6fa > > 92cd99c5c301635%7C0%7C0%7C638381577622080432%7CUnknown%7CTWFpbGZsb3d8eyJW > > IjoiMC4wLjAwMDAiLCJQIjoiV2 > > luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=VlpRPcnJTmywfS > > amaGB1Ev8aPN2Hi596VbbRNGXF yis%3D&reserved=0
Hi Alexander, > > Hi, > > Am Freitag, 15. Dezember 2023, 03:12:43 CET schrieb Xu Yang: > > Hi Alexander, > > > > > Hi, > > > > > > thanks for the patch. > > > > > > Am Donnerstag, 14. Dezember 2023, 12:24:41 CET schrieb Xu Yang: > > > > There are 2 USB controllers on i.MX93. Add them. > > > > > > > > Signed-off-by: Xu Yang <xu.yang_2@nxp.com> > > > > --- > > > > > > > > arch/arm64/boot/dts/freescale/imx93.dtsi | 58 ++++++++++++++++++++++++ > > > > 1 file changed, 58 insertions(+) > > > > > > > > diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi > > > > b/arch/arm64/boot/dts/freescale/imx93.dtsi index > > > > 34c0540276d1..bcf4861cfede > > > > 100644 > > > > --- a/arch/arm64/boot/dts/freescale/imx93.dtsi > > > > +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi > > > > @@ -171,6 +171,20 @@ cm33: remoteproc-cm33 { > > > > > > > > status = "disabled"; > > > > > > > > }; > > > > > > > > + usbphynop1: usbphynop1 { > > > > + #phy-cells = <0>; > > > > + compatible = "usb-nop-xceiv"; > > > > > > compatible first. > > > > Okay. > > > > > > + clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>; > > > > + clock-names = "main_clk"; > > > > + }; > > > > + > > > > + usbphynop2: usbphynop2 { > > > > + #phy-cells = <0>; > > > > + compatible = "usb-nop-xceiv"; > > > > > > compatible first. > > > > Okay. > > > > > > + clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>; > > > > + clock-names = "main_clk"; > > > > + }; > > > > + > > > > > > > > soc@0 { > > > > > > > > compatible = "simple-bus"; > > > > #address-cells = <1>; > > > > > > > > @@ -1059,5 +1073,49 @@ ddr-pmu@4e300dc0 { > > > > > > > > reg = <0x4e300dc0 0x200>; > > > > interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; > > > > > > > > }; > > > > > > > > + > > > > + usbotg1: usb@4c100000 { > > > > + compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb", > > > > > > "fsl,imx27-usb"; > > > > > > > + reg = <0x4c100000 0x200>; > > > > + interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; > > > > + clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>, > > > > + <&clk IMX93_CLK_HSIO_32K_GATE>; > > > > + clock-names = "usb_ctrl_root_clk", > > > > > > "usb_wakeup_clk"; > > > > > > drivers/usb/chipidea/ci_hdrc_imx.c uses 3 clocks: "ipg", "ahb" and "per", > > > see imx_get_clks(). How is this supposed to work? > > > > I have sent another patch to get this clock. > > > https://lore.kernel.org/all/20231214112622.2412321- > 1- > xu.yang_2%40nxp.com%2F&data=05%7C02%7Cxu.yang_2%40nxp.com%7Cbdf207787e9f448553f808dbfd379cda%7C686ea1 > d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638382187526271036%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMD > AiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=FkQ5Cf4iYfCPj79ZnR5XxshIdkWeLOyV > 8tmWYWnh2GU%3D&reserved=0 > > Okay, but that adds another clock which is not mentioned in Documentation/ > devicetree/bindings/usb/ci-hdrc-usb2.yaml at all. I guess some compatible- > specific constraints regarding number of clocks should be added. Right, will try to add such info. Thanks, Xu Yang > > Best regards, > Alexander > > > > > > > + assigned-clocks = <&clk IMX93_CLK_HSIO>; > > > > + assigned-clock-parents = <&clk > > > > > > IMX93_CLK_SYS_PLL_PFD1_DIV2>; > > > > > > > + assigned-clock-rates = <133000000>; > > > > + fsl,usbphy = <&usbphynop1>; > > > > + fsl,usbmisc = <&usbmisc1 0>; > > > > + status = "disabled"; > > > > + }; > > > > + > > > > + usbmisc1: usbmisc@4c100200 { > > > > + compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d- > > > > > > usbmisc", > > > > > > > + "fsl,imx6q-usbmisc"; > > > > > > This means you are compatible to fsl,imx7d-usbmisc. Which means you use > > > register MX7D_USB_OTG_PHY_STATUS in USB misc (USBNC). But i.MX93 RM Rev. 2 > > > (04/2023) lacks this and other registers. > > > > Some registers in USBNC are not shown. The internal RM has these registers. > > > > > > + #index-cells = <1>; > > > > + reg = <0x4c100200 0x200>; > > > > > > reg after compatible. > > > > Okay. > > > > > > + }; > > > > + > > > > + usbotg2: usb@4c200000 { > > > > + compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb", > > > > > > "fsl,imx27-usb"; > > > > > > > + reg = <0x4c200000 0x200>; > > > > + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; > > > > + clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>, > > > > + <&clk IMX93_CLK_HSIO_32K_GATE>; > > > > + clock-names = "usb_ctrl_root_clk", > > > > > > "usb_wakeup_clk"; > > > > > > The same as for usbotg1 applies here. > > > > Okay. > > > > > > + assigned-clocks = <&clk IMX93_CLK_HSIO>; > > > > + assigned-clock-parents = <&clk > > > > > > IMX93_CLK_SYS_PLL_PFD1_DIV2>; > > > > > > > + assigned-clock-rates = <133000000>; > > > > + fsl,usbphy = <&usbphynop2>; > > > > + fsl,usbmisc = <&usbmisc2 0>; > > > > + status = "disabled"; > > > > + }; > > > > + > > > > + usbmisc2: usbmisc@4c200200 { > > > > + compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d- > > > > > > usbmisc", > > > > > > > + "fsl,imx6q-usbmisc"; > > > > + #index-cells = <1>; > > > > + reg = <0x4c200200 0x200>; > > > > > > The same as for usbmisc1 applies here. > > > > Okay. > > > > > > + }; > > > > > > > > }; > > > > > > > > }; > > > > > > Best regards, > > > Alexander > > > > > > -- > > > TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany > > > Amtsgericht München, HRB 105018 > > > Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider > > > http://www.tq-/ > %2F&data=05%7C02%7Cxu.yang_2%40nxp.com%7Cbdf207787e9f448553f808dbfd379cda%7C686ea1d3bc2b4c6fa92cd99c5c > 301635%7C0%7C0%7C638382187526271036%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJ > BTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=UywLIIbPswQULh%2FLuAJ7xdVbGCGSDjeOSW%2B%2B%2F > 2M2qgM%3D&reserved=0 > > > group.com%2F&data=05%7C02%7Cxu.yang_2%40nxp.com%7C10ff5a35f53f4047ae1d08db > > > fca99c38%7C686ea1d3bc2b4c6fa > > > 92cd99c5c301635%7C0%7C0%7C638381577622080432%7CUnknown%7CTWFpbGZsb3d8eyJW > > > IjoiMC4wLjAwMDAiLCJQIjoiV2 > > > luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=VlpRPcnJTmywfS > > > amaGB1Ev8aPN2Hi596VbbRNGXF yis%3D&reserved=0 > > > -- > TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany > Amtsgericht München, HRB 105018 > Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider > http://www.tq-/ > group.com%2F&data=05%7C02%7Cxu.yang_2%40nxp.com%7Cbdf207787e9f448553f808dbfd379cda%7C686ea1d3bc2b4c6fa > 92cd99c5c301635%7C0%7C0%7C638382187526271036%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2 > luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=%2BhTDWMHhsHOxFkAyQh%2FtsuGV523FFNPeKi > FZ7b0APnc%3D&reserved=0 >
diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi index 34c0540276d1..bcf4861cfede 100644 --- a/arch/arm64/boot/dts/freescale/imx93.dtsi +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi @@ -171,6 +171,20 @@ cm33: remoteproc-cm33 { status = "disabled"; }; + usbphynop1: usbphynop1 { + #phy-cells = <0>; + compatible = "usb-nop-xceiv"; + clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>; + clock-names = "main_clk"; + }; + + usbphynop2: usbphynop2 { + #phy-cells = <0>; + compatible = "usb-nop-xceiv"; + clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>; + clock-names = "main_clk"; + }; + soc@0 { compatible = "simple-bus"; #address-cells = <1>; @@ -1059,5 +1073,49 @@ ddr-pmu@4e300dc0 { reg = <0x4e300dc0 0x200>; interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; }; + + usbotg1: usb@4c100000 { + compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb", "fsl,imx27-usb"; + reg = <0x4c100000 0x200>; + interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>, + <&clk IMX93_CLK_HSIO_32K_GATE>; + clock-names = "usb_ctrl_root_clk", "usb_wakeup_clk"; + assigned-clocks = <&clk IMX93_CLK_HSIO>; + assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>; + assigned-clock-rates = <133000000>; + fsl,usbphy = <&usbphynop1>; + fsl,usbmisc = <&usbmisc1 0>; + status = "disabled"; + }; + + usbmisc1: usbmisc@4c100200 { + compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc", + "fsl,imx6q-usbmisc"; + #index-cells = <1>; + reg = <0x4c100200 0x200>; + }; + + usbotg2: usb@4c200000 { + compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb", "fsl,imx27-usb"; + reg = <0x4c200000 0x200>; + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>, + <&clk IMX93_CLK_HSIO_32K_GATE>; + clock-names = "usb_ctrl_root_clk", "usb_wakeup_clk"; + assigned-clocks = <&clk IMX93_CLK_HSIO>; + assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>; + assigned-clock-rates = <133000000>; + fsl,usbphy = <&usbphynop2>; + fsl,usbmisc = <&usbmisc2 0>; + status = "disabled"; + }; + + usbmisc2: usbmisc@4c200200 { + compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc", + "fsl,imx6q-usbmisc"; + #index-cells = <1>; + reg = <0x4c200200 0x200>; + }; }; };
There are 2 USB controllers on i.MX93. Add them. Signed-off-by: Xu Yang <xu.yang_2@nxp.com> --- arch/arm64/boot/dts/freescale/imx93.dtsi | 58 ++++++++++++++++++++++++ 1 file changed, 58 insertions(+)