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Sat, 16 Dec 2023 08:27:19 -0800 (PST) Received: from U4.lan ([2a02:810b:f40:4300:e807:d345:6f47:1db9]) by smtp.gmail.com with ESMTPSA id st10-20020a170907c08a00b00a1cd0794696sm11990362ejc.53.2023.12.16.08.27.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Dec 2023 08:27:19 -0800 (PST) From: Alex Bee To: Sandy Huang , =?utf-8?q?Heiko_St=C3=BCbner?= , Andy Yan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann Cc: David Airlie , Daniel Vetter , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Alex Bee Subject: [PATCH v2 19/27] drm/rockchip: inno_hdmi: Move tmds rate to connector state subclass Date: Sat, 16 Dec 2023 17:26:30 +0100 Message-ID: <20231216162639.125215-20-knaerzche@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231216162639.125215-1-knaerzche@gmail.com> References: <20231216162639.125215-1-knaerzche@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231216_082721_112413_8A1CDA54 X-CRM114-Status: GOOD ( 19.88 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Similar to the othter members of inno_hdmi_connector_state the tmds_rate is not a property of the device, but of the connector state. Move it to inno_hdmi_connector_state and make it a long to comply with the clock framework. To get arround the issue of not having the connector state when inno_hdmi_i2c_init is called in the bind path, getting the tmds rate is wrapped in function which returns the fallback rate if the connector doesn't have a state yet. Signed-off-by: Alex Bee --- changes in v2: - new patch drivers/gpu/drm/rockchip/inno_hdmi.c | 36 +++++++++++++++++++--------- 1 file changed, 25 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/rockchip/inno_hdmi.c b/drivers/gpu/drm/rockchip/inno_hdmi.c index f9bfae1e97a2..6799d24501b8 100644 --- a/drivers/gpu/drm/rockchip/inno_hdmi.c +++ b/drivers/gpu/drm/rockchip/inno_hdmi.c @@ -47,14 +47,13 @@ struct inno_hdmi { struct inno_hdmi_i2c *i2c; struct i2c_adapter *ddc; - - unsigned int tmds_rate; }; struct inno_hdmi_connector_state { struct drm_connector_state base; unsigned int enc_out_format; unsigned int colorimetry; + unsigned long tmds_rate; }; static struct inno_hdmi *encoder_to_inno_hdmi(struct drm_encoder *encoder) @@ -133,11 +132,33 @@ static inline void hdmi_modb(struct inno_hdmi *hdmi, u16 offset, hdmi_writeb(hdmi, offset, temp); } +static unsigned long inno_hdmi_tmds_rate(struct inno_hdmi *hdmi) +{ + struct drm_connector *connector = &hdmi->connector; + struct drm_connector_state *conn_state = connector->state; + struct inno_hdmi_connector_state *inno_conn_state; + + if (conn_state) { + inno_conn_state = to_inno_hdmi_conn_state(conn_state); + return inno_conn_state->tmds_rate; + } + + /* + * When IP controller haven't configured to an accurate video + * timing, then the TMDS clock source would be switched to + * PCLK_HDMI, so we need to init the TMDS rate to PCLK rate, + * and reconfigure the DDC clock. + */ + + return clk_get_rate(hdmi->pclk); +} + static void inno_hdmi_i2c_init(struct inno_hdmi *hdmi) { int ddc_bus_freq; + unsigned long tmds_rate = inno_hdmi_tmds_rate(hdmi); - ddc_bus_freq = (hdmi->tmds_rate >> 2) / HDMI_SCL_RATE; + ddc_bus_freq = (tmds_rate >> 2) / HDMI_SCL_RATE; hdmi_writeb(hdmi, DDC_BUS_FREQ_L, ddc_bus_freq & 0xFF); hdmi_writeb(hdmi, DDC_BUS_FREQ_H, (ddc_bus_freq >> 8) & 0xFF); @@ -431,7 +452,7 @@ static int inno_hdmi_setup(struct inno_hdmi *hdmi, * DCLK_LCDC, so we need to init the TMDS rate to mode pixel * clock rate, and reconfigure the DDC clock. */ - hdmi->tmds_rate = mode->clock * 1000; + inno_conn_state->tmds_rate = mode->clock * 1000; inno_hdmi_i2c_init(hdmi); /* Unmute video and audio output */ @@ -823,13 +844,6 @@ static int inno_hdmi_bind(struct device *dev, struct device *master, goto err_disable_clk; } - /* - * When IP controller haven't configured to an accurate video - * timing, then the TMDS clock source would be switched to - * PCLK_HDMI, so we need to init the TMDS rate to PCLK rate, - * and reconfigure the DDC clock. - */ - hdmi->tmds_rate = clk_get_rate(hdmi->pclk); inno_hdmi_i2c_init(hdmi); ret = inno_hdmi_register(drm, hdmi);