From patchwork Sat Mar 9 13:31:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13587657 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 81174C54798 for ; Sat, 9 Mar 2024 13:32:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=YtOaO9i5qNx7lo8Q+GxDy6FWZiuo9y4mQLlI+8sqOGM=; b=UaxNnkTcKKzESO A7N6twSBrxNMWoW5RrC+u/UQbYB8VvivoAPB3vmPHPKEDBHZvvjGt/o224julrEFffdlf34FoW4iS kqBC2kdr3z5Yb93fijqHac0f96LRo7AiC0NKE/RgYpVsLpnee5jaDgMNBVweEhNP4ccBJs4zcYmFw haFvKAbQbAeLVzixj2aAGD5SXMmV/EVnEndJkBvkxrgdI4Goo1ZvHMBfkAip71D4KJhpGjmMOaBsC rmod/B5ftbLzcjOiF23wf90ypvr0X/h64tkiw4vRP1OR/np9fwcxd9MbwuU1h5k7pV3Sk40Bip/Bg 95fLOFXFGkKYBZEbScTA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1riwno-0000000DRES-3lHP; Sat, 09 Mar 2024 13:31:52 +0000 Received: from mail-lj1-x235.google.com ([2a00:1450:4864:20::235]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1riwng-0000000DRAv-0dqL for linux-arm-kernel@lists.infradead.org; Sat, 09 Mar 2024 13:31:46 +0000 Received: by mail-lj1-x235.google.com with SMTP id 38308e7fff4ca-2d21cdbc85bso40899961fa.2 for ; Sat, 09 Mar 2024 05:31:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709991102; x=1710595902; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=HhZUYlRhQA4TRIHl3TIBSQxZHd0u1mWSXp3lOhorupc=; b=BXtuod89HXlKeCOI8M5S28msu+iy4nKNiNlB1P2nvNL/u7MSDEhxQOm3iYcMXrAdrK S7VJTD9b7zVzoSmUh6Qp6cQ0hZedgwWDbVHzLfW1M81TQuMjwvsgtwqCGCvfmPrOjYj4 ReBzVfOPDoKGeWqmP7egBczhb/Lo7E50gazpi0LFYIwAwEkmH0uaxYBJPzye0pmirWvK 5Ph+oK6ZpdQZx22yrW1yQw46BzjMA9mlYPiHxi1XNGdw8PWP6ngZPcRnCHAiG8gdQiIp Aem0KMW5/JddlCktLtvUPAT0I0an/KNkw9Gn1lTRBXPxXCUfA6Lcunq1YZqOc7hsVpGT hIJg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709991102; x=1710595902; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HhZUYlRhQA4TRIHl3TIBSQxZHd0u1mWSXp3lOhorupc=; b=GMKfg217eAlzUAjyPVnrUtfHc/7tX3gboyrZyXZMGiBmyQY3wftKJoLC/OdfIyFTkB pIMUxyZJqGVPB/UdBjOy+kzplG5b8y4gXsH6WJIqdbDpWBbdwBsKFUalTHLVTN5w0HDu WM+itnoC9D3QvZTagzqW9LF8XIiOKIlRj5XNyXR2Nfwklq5h4WB8aRBNo2cl20iH0Wo2 8Df0QcJNGaLDkhC6lW+lga7MiaJU+J+emlexF79zk+K9lccLCZuiv0LoI8r9DCimqN4w PL5Kfzm7YUsDqaHCFaTmVzeNPRyU8P9XiyVtCJBEJoeQ0+IPSoxOlhLad2X2oaSz1ZrV iycA== X-Forwarded-Encrypted: i=1; AJvYcCVVOQlNCxUsjlVyWlr83tQQf71Yb1SkL+xE6BkKGfEu5QtzPu3g7LdBj4B8I+yNh4Q12W6eHZgnek+9Aa+pTLsnY22Cs3Q65kYlnkuhAssIVxANHYA= X-Gm-Message-State: AOJu0YxLDd3k7d7A072Z1x+Pso9hamwgjPDt+CbjEOfQeGC+EanwDD0f EUwPGMzh/GLVGlDuxvHpqTqwswKrdWqtKRYjw5gkdWpflovJgrFZPuuZYdsupv0= X-Google-Smtp-Source: AGHT+IGqsmrKp7W/U4LiUYplVhsAtxRfWaDh47ahuBH3QgrHH81CJ7JaRO1xF0JhNUs6ZxhrFtJyQQ== X-Received: by 2002:a2e:8610:0:b0:2d4:251f:c151 with SMTP id a16-20020a2e8610000000b002d4251fc151mr1150344lji.46.1709991102106; Sat, 09 Mar 2024 05:31:42 -0800 (PST) Received: from [10.167.154.1] (078088045141.garwolin.vectranet.pl. [78.88.45.141]) by smtp.gmail.com with ESMTPSA id t27-20020a2e8e7b000000b002d08f3640b5sm298524ljk.11.2024.03.09.05.31.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 09 Mar 2024 05:31:41 -0800 (PST) From: Konrad Dybcio Date: Sat, 09 Mar 2024 14:31:10 +0100 Subject: [PATCH v2 2/2] arm64: dts: qcom: sc8280xp: Describe the PCIe SMMUv3 MIME-Version: 1.0 Message-Id: <20231219-topic-8280_smmuv3-v2-2-c67bd3226687@linaro.org> References: <20231219-topic-8280_smmuv3-v2-0-c67bd3226687@linaro.org> In-Reply-To: <20231219-topic-8280_smmuv3-v2-0-c67bd3226687@linaro.org> To: Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Will Deacon , Robin Murphy , Joerg Roedel , Rob Herring Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, Johan Hovold , Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1709991097; l=1664; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=ddTyXD0L1FluRMgAEy4AyF61rMcBg/kryptIgklrmCk=; b=MnzEy58ojuKm7m/odlIGtrimc8a/DArIDyAiRUYU5/UBseU0wxX+NzrDP2hK/VAMJBFrgm0ii LP4n5g2+g6QB1tQLGFiAgVbGGdJNibptSFC5O+QIpYSck6J0euKhxTV X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240309_053144_236267_AE115D67 X-CRM114-Status: GOOD ( 13.61 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org SC8280XP actually has a third SMMU, which can be seen in e.g. the IORT ACPI table and is used for the PCIe hosts. Unfortunately though, the secure firmware seems to be configured in a way such that Linux can't touch it, not even read back the ID registers. It also seems like the SMMU is configured to run in some sort of bypass mode, completely opaque to the OS. Describe it so that one can configure it when running Linux as a hypervisor (e.g with [1]) and for hardware description completeness. [1] https://github.com/TravMurav/slbounce Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index a5b194813079..28edd30a9c04 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -4648,6 +4648,22 @@ cci3_i2c1_sleep: cci3-i2c1-sleep-pins { }; }; + pcie_smmu: iommu@14f80000 { + compatible = "qcom,sc8280xp-smmu-v3", "arm,smmu-v3"; + reg = <0 0x14f80000 0 0x80000>; + interrupts = , + , + ; + interrupt-names = "eventq", + "gerror", + "cmdq-sync"; + #iommu-cells = <1>; + dma-coherent; + + /* The hypervisor prevents register access from Linux */ + status = "reserved"; + }; + apps_smmu: iommu@15000000 { compatible = "qcom,sc8280xp-smmu-500", "arm,mmu-500"; reg = <0 0x15000000 0 0x100000>;