| Message ID | 20231219174548.3481-2-diogo.ivo@siemens.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add support for ICSSG-based Ethernet on SR1.0 devices | expand |
On 19/12/2023 18:45, Diogo Ivo wrote: > Silicon Revision 1.0 of the AM65x came with a slightly different ICSSG > support: Only 2 PRUs per slice are available and instead 2 additional > DMA channels are used for management purposes. We have no restrictions > on specified PRUs, but the DMA channels need to be adjusted. > > Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> > Signed-off-by: Diogo Ivo <diogo.ivo@siemens.com> > --- > .../bindings/net/ti,icssg-prueth.yaml | 62 +++++++++++++------ > 1 file changed, 44 insertions(+), 18 deletions(-) > > diff --git a/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml b/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml > index 229c8f32019f..fbe51731854a 100644 > --- a/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml > +++ b/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml > @@ -19,30 +19,15 @@ allOf: > properties: > compatible: > enum: > - - ti,am642-icssg-prueth # for AM64x SoC family > - - ti,am654-icssg-prueth # for AM65x SoC family > + - ti,am642-icssg-prueth # for AM64x SoC family > + - ti,am654-icssg-prueth # for AM65x SoC family, SR2.x > + - ti,am654-icssg-prueth-sr1 # for AM65x SoC family, SR1.0 sr1 is revision of am654, so it should be added to SoC name, not at the end of binding. > > sram: > $ref: /schemas/types.yaml#/definitions/phandle > description: > phandle to MSMC SRAM node > > - dmas: > - maxItems: 10 Why are you removing top-level properties? They must stay here in widest constrains. > - > - dma-names: > - items: > - - const: tx0-0 > - - const: tx0-1 > - - const: tx0-2 > - - const: tx0-3 > - - const: tx1-0 > - - const: tx1-1 > - - const: tx1-2 > - - const: tx1-3 > - - const: rx0 > - - const: rx1 Grow it and use minItems. > - > ti,mii-g-rt: > $ref: /schemas/types.yaml#/definitions/phandle > description: > @@ -122,6 +107,47 @@ properties: > - required: > - port@1 > Missing allOf and then it goes after required block. > +if: > + properties: > + compatible: > + contains: > + enum: > + - ti,am654-icssg-prueth-sr1 > +then: > + properties: > + dmas: minItems > + maxItems: 12 > + dma-names: > + items: minItems instead > + - const: tx0-0 > + - const: tx0-1 > + - const: tx0-2 > + - const: tx0-3 > + - const: tx1-0 > + - const: tx1-1 > + - const: tx1-2 > + - const: tx1-3 > + - const: rx0 > + - const: rx1 > + - const: rxmgm0 > + - const: rxmgm1 > +else: > + properties: > + dmas: > + maxItems: 10 > + dma-names: > + items: maxItems instead Best regards, Krzysztof
Hi, On 19/12/2023 19:45, Diogo Ivo wrote: > Silicon Revision 1.0 of the AM65x came with a slightly different ICSSG > support: Only 2 PRUs per slice are available and instead 2 additional > DMA channels are used for management purposes. We have no restrictions > on specified PRUs, but the DMA channels need to be adjusted. > > Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> > Signed-off-by: Diogo Ivo <diogo.ivo@siemens.com> > --- > .../bindings/net/ti,icssg-prueth.yaml | 62 +++++++++++++------ > 1 file changed, 44 insertions(+), 18 deletions(-) > > diff --git a/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml b/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml > index 229c8f32019f..fbe51731854a 100644 > --- a/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml > +++ b/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml > @@ -19,30 +19,15 @@ allOf: > properties: > compatible: > enum: > - - ti,am642-icssg-prueth # for AM64x SoC family > - - ti,am654-icssg-prueth # for AM65x SoC family > + - ti,am642-icssg-prueth # for AM64x SoC family > + - ti,am654-icssg-prueth # for AM65x SoC family, SR2.x You don't need to explicitly mention SR2.x here and in the rest of the patches. That way there are fewer changes. > + - ti,am654-icssg-prueth-sr1 # for AM65x SoC family, SR1.0 > > sram: > $ref: /schemas/types.yaml#/definitions/phandle > description: > phandle to MSMC SRAM node > > - dmas: > - maxItems: 10 > - > - dma-names: > - items: > - - const: tx0-0 > - - const: tx0-1 > - - const: tx0-2 > - - const: tx0-3 > - - const: tx1-0 > - - const: tx1-1 > - - const: tx1-2 > - - const: tx1-3 > - - const: rx0 > - - const: rx1 > - > ti,mii-g-rt: > $ref: /schemas/types.yaml#/definitions/phandle > description: > @@ -122,6 +107,47 @@ properties: > - required: > - port@1 > > +if: > + properties: > + compatible: > + contains: > + enum: > + - ti,am654-icssg-prueth-sr1 > +then: > + properties: > + dmas: > + maxItems: 12 > + dma-names: > + items: > + - const: tx0-0 > + - const: tx0-1 > + - const: tx0-2 > + - const: tx0-3 > + - const: tx1-0 > + - const: tx1-1 > + - const: tx1-2 > + - const: tx1-3 > + - const: rx0 > + - const: rx1 > + - const: rxmgm0 > + - const: rxmgm1 > +else: > + properties: > + dmas: > + maxItems: 10 > + dma-names: > + items: > + - const: tx0-0 > + - const: tx0-1 > + - const: tx0-2 > + - const: tx0-3 > + - const: tx1-0 > + - const: tx1-1 > + - const: tx1-2 > + - const: tx1-3 > + - const: rx0 > + - const: rx1 > + > required: > - compatible > - sram
diff --git a/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml b/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml index 229c8f32019f..fbe51731854a 100644 --- a/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml +++ b/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml @@ -19,30 +19,15 @@ allOf: properties: compatible: enum: - - ti,am642-icssg-prueth # for AM64x SoC family - - ti,am654-icssg-prueth # for AM65x SoC family + - ti,am642-icssg-prueth # for AM64x SoC family + - ti,am654-icssg-prueth # for AM65x SoC family, SR2.x + - ti,am654-icssg-prueth-sr1 # for AM65x SoC family, SR1.0 sram: $ref: /schemas/types.yaml#/definitions/phandle description: phandle to MSMC SRAM node - dmas: - maxItems: 10 - - dma-names: - items: - - const: tx0-0 - - const: tx0-1 - - const: tx0-2 - - const: tx0-3 - - const: tx1-0 - - const: tx1-1 - - const: tx1-2 - - const: tx1-3 - - const: rx0 - - const: rx1 - ti,mii-g-rt: $ref: /schemas/types.yaml#/definitions/phandle description: @@ -122,6 +107,47 @@ properties: - required: - port@1 +if: + properties: + compatible: + contains: + enum: + - ti,am654-icssg-prueth-sr1 +then: + properties: + dmas: + maxItems: 12 + dma-names: + items: + - const: tx0-0 + - const: tx0-1 + - const: tx0-2 + - const: tx0-3 + - const: tx1-0 + - const: tx1-1 + - const: tx1-2 + - const: tx1-3 + - const: rx0 + - const: rx1 + - const: rxmgm0 + - const: rxmgm1 +else: + properties: + dmas: + maxItems: 10 + dma-names: + items: + - const: tx0-0 + - const: tx0-1 + - const: tx0-2 + - const: tx0-3 + - const: tx1-0 + - const: tx1-1 + - const: tx1-2 + - const: tx1-3 + - const: rx0 + - const: rx1 + required: - compatible - sram