| Message ID | 20231220095141.27883-3-fusibrandon13@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add support for reading D1 efuse speed bin | expand |
Dne sreda, 20. december 2023 ob 10:51:41 CET je Brandon Cheo Fusi napisal(a): > Specifies two voltage ranges, in order of increasing stability, > for each OPP. This is heavily inspired by > > https://github.com/Tina-Linux/linux-5.4/blob/master/arch/riscv/boot/dts/sunxi/sun20iw1p1.dtsi#L118-L133 > > and > > https://github.com/mangopi-sbc/tina-linux-5.4/blob/0d4903ebd9d2194ad914686d5b0fc1ddacf11a9d/arch/riscv/boot/dts/sunxi/sun20iw1p1.dtsi#L118-L182 Remove links from message. If you really want them, add Link tag for each. > > Signed-off-by: Brandon Cheo Fusi <fusibrandon13@gmail.com> > --- > arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi > index 2f1771c19..8e7bc8bd0 100644 > --- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi > +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi > @@ -48,13 +48,17 @@ opp_table_cpu: opp-table-cpu { > opp-408000000 { > clock-latency-ns = <244144>; /* 8 32k periods */ > opp-hz = /bits/ 64 <408000000>; > - opp-microvolt-speed0 = <900000 900000 1100000>; > + > + opp-microvolt-speed0 = <950000 900000 1100000>; Second value should be same as first, otherwise you'll experience stability issue. > + opp-microvolt-speed1 = <900000 900000 1100000>; > }; > > opp-1080000000 { > clock-latency-ns = <244144>; /* 8 32k periods */ > opp-hz = /bits/ 64 <1008000000>; > - opp-microvolt-speed0 = <900000 900000 1100000>; > + > + opp-microvolt-speed0 = <1100000 900000 1100000>; Ditto. Best regards, Jernej > + opp-microvolt-speed1 = <950000 900000 1100000>; > }; > }; > >
diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi index 2f1771c19..8e7bc8bd0 100644 --- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi @@ -48,13 +48,17 @@ opp_table_cpu: opp-table-cpu { opp-408000000 { clock-latency-ns = <244144>; /* 8 32k periods */ opp-hz = /bits/ 64 <408000000>; - opp-microvolt-speed0 = <900000 900000 1100000>; + + opp-microvolt-speed0 = <950000 900000 1100000>; + opp-microvolt-speed1 = <900000 900000 1100000>; }; opp-1080000000 { clock-latency-ns = <244144>; /* 8 32k periods */ opp-hz = /bits/ 64 <1008000000>; - opp-microvolt-speed0 = <900000 900000 1100000>; + + opp-microvolt-speed0 = <1100000 900000 1100000>; + opp-microvolt-speed1 = <950000 900000 1100000>; }; };
Specifies two voltage ranges, in order of increasing stability, for each OPP. This is heavily inspired by https://github.com/Tina-Linux/linux-5.4/blob/master/arch/riscv/boot/dts/sunxi/sun20iw1p1.dtsi#L118-L133 and https://github.com/mangopi-sbc/tina-linux-5.4/blob/0d4903ebd9d2194ad914686d5b0fc1ddacf11a9d/arch/riscv/boot/dts/sunxi/sun20iw1p1.dtsi#L118-L182 Signed-off-by: Brandon Cheo Fusi <fusibrandon13@gmail.com> --- arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-)