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Wysocki" , Viresh Kumar Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Brandon Cheo Fusi Subject: [RFC PATCH 2/2] riscv: dts: allwinner: Fill in OPPs Date: Wed, 20 Dec 2023 10:51:41 +0100 Message-Id: <20231220095141.27883-3-fusibrandon13@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20231220095141.27883-1-fusibrandon13@gmail.com> References: <20231220095141.27883-1-fusibrandon13@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231220_015225_923205_34E1734F X-CRM114-Status: UNSURE ( 9.73 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Specifies two voltage ranges, in order of increasing stability, for each OPP. This is heavily inspired by https://github.com/Tina-Linux/linux-5.4/blob/master/arch/riscv/boot/dts/sunxi/sun20iw1p1.dtsi#L118-L133 and https://github.com/mangopi-sbc/tina-linux-5.4/blob/0d4903ebd9d2194ad914686d5b0fc1ddacf11a9d/arch/riscv/boot/dts/sunxi/sun20iw1p1.dtsi#L118-L182 Signed-off-by: Brandon Cheo Fusi --- arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi index 2f1771c19..8e7bc8bd0 100644 --- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi @@ -48,13 +48,17 @@ opp_table_cpu: opp-table-cpu { opp-408000000 { clock-latency-ns = <244144>; /* 8 32k periods */ opp-hz = /bits/ 64 <408000000>; - opp-microvolt-speed0 = <900000 900000 1100000>; + + opp-microvolt-speed0 = <950000 900000 1100000>; + opp-microvolt-speed1 = <900000 900000 1100000>; }; opp-1080000000 { clock-latency-ns = <244144>; /* 8 32k periods */ opp-hz = /bits/ 64 <1008000000>; - opp-microvolt-speed0 = <900000 900000 1100000>; + + opp-microvolt-speed0 = <1100000 900000 1100000>; + opp-microvolt-speed1 = <950000 900000 1100000>; }; };