| Message ID | 20240119101656.965744-1-heiko@sntech.de (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: dts: rockchip: set num-cs property for spi on px30 | expand |
Hi Heiko, On 1/19/24 11:16, Heiko Stuebner wrote: > From: Heiko Stuebner <heiko.stuebner@cherry.de> > > The px30 has two spi controllers with two chip-selects each. > The num-cs property is specified as the total number of chip > selects a controllers has and is used since 2020 to find uses > of chipselects outside that range in the Rockchip spi driver. > > Without the property set, the default is 1, so spi devices > using the second chipselect will not be created. > > Fixes: eb1262e3cc8b ("spi: spi-rockchip: use num-cs property and ctlr->enable_gpiods") > Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Cheers, Quentin
Hi, On 1/19/24 11:16, Heiko Stuebner wrote: > From: Heiko Stuebner <heiko.stuebner@cherry.de> > > The px30 has two spi controllers with two chip-selects each. > The num-cs property is specified as the total number of chip > selects a controllers has and is used since 2020 to find uses > of chipselects outside that range in the Rockchip spi driver. > Without the property set, the default is 1, so spi devices > using the second chipselect will not be created. num-cs is defined as 32 bit: num-cs: $ref: /schemas/types.yaml#/definitions/uint32 description: Total number of chip selects. === num-cs is parsed as 16 bit in spi-rockchip.c: #define ROCKCHIP_SPI_MAX_CS_NUM <https://elixir.bootlin.com/linux/latest/C/ident/ROCKCHIP_SPI_MAX_CS_NUM> 4+ ctlr->max_native_cs = ROCKCHIP_SPI_MAX_CS_NUM; + /* + * rk spi0 has two native cs, spi1..5 one cs only + * if num-cs is missing in the dts, default to 1 + */ + if (of_property_read_u16(np, "num-cs", &ctlr->num_chipselect)) u32 + ctlr->num_chipselect = 1; + ctlr->use_gpio_descriptors = true; === num-cs: minimum: 1 maximum: 4 default: 1 Both the driver as the binding need a little update. Johan > > Fixes: eb1262e3cc8b ("spi: spi-rockchip: use num-cs property and ctlr->enable_gpiods") > Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> > --- > arch/arm64/boot/dts/rockchip/px30.dtsi | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi > index 42ce78beb413..20955556b624 100644 > --- a/arch/arm64/boot/dts/rockchip/px30.dtsi > +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi > @@ -632,6 +632,7 @@ spi0: spi@ff1d0000 { > clock-names = "spiclk", "apb_pclk"; > dmas = <&dmac 12>, <&dmac 13>; > dma-names = "tx", "rx"; > + num-cs = <2>; > pinctrl-names = "default"; > pinctrl-0 = <&spi0_clk &spi0_csn &spi0_miso &spi0_mosi>; > #address-cells = <1>; > @@ -647,6 +648,7 @@ spi1: spi@ff1d8000 { > clock-names = "spiclk", "apb_pclk"; > dmas = <&dmac 14>, <&dmac 15>; > dma-names = "tx", "rx"; > + num-cs = <2>; > pinctrl-names = "default"; > pinctrl-0 = <&spi1_clk &spi1_csn0 &spi1_csn1 &spi1_miso &spi1_mosi>; > #address-cells = <1>;
Hi Johan, Am Montag, 22. Januar 2024, 17:05:11 CET schrieb Johan Jonker: > Hi, > > On 1/19/24 11:16, Heiko Stuebner wrote: > > From: Heiko Stuebner <heiko.stuebner@cherry.de> > > > > The px30 has two spi controllers with two chip-selects each. > > The num-cs property is specified as the total number of chip > > selects a controllers has and is used since 2020 to find uses > > of chipselects outside that range in the Rockchip spi driver. > > > Without the property set, the default is 1, so spi devices > > using the second chipselect will not be created. > > > num-cs is defined as 32 bit: > > num-cs: > $ref: /schemas/types.yaml#/definitions/uint32 > description: > > Total number of chip selects. > > === > > num-cs is parsed as 16 bit in spi-rockchip.c: > > #define ROCKCHIP_SPI_MAX_CS_NUM <https://elixir.bootlin.com/linux/latest/C/ident/ROCKCHIP_SPI_MAX_CS_NUM> 4+ ctlr->max_native_cs = ROCKCHIP_SPI_MAX_CS_NUM; + /* + * rk spi0 has two native cs, spi1..5 one cs only + * if num-cs is missing in the dts, default to 1 + */ + if (of_property_read_u16(np, "num-cs", &ctlr->num_chipselect)) u32 + ctlr->num_chipselect = 1; + ctlr->use_gpio_descriptors = true; === num-cs: minimum: 1 maximum: 4 > default: 1 > Both the driver as the binding need a little update. Johan hmm, this confuses me. Looking at a commit from 2022 [0] that was already fixed in the driver? So bith the binding and the driver expect u32 values it seems. [0] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=9382df0a98aad5bbcd4d634790305a1d786ad224 Heiko > > Fixes: eb1262e3cc8b ("spi: spi-rockchip: use num-cs property and ctlr->enable_gpiods") > > Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> > > --- > > arch/arm64/boot/dts/rockchip/px30.dtsi | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi > > index 42ce78beb413..20955556b624 100644 > > --- a/arch/arm64/boot/dts/rockchip/px30.dtsi > > +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi > > @@ -632,6 +632,7 @@ spi0: spi@ff1d0000 { > > clock-names = "spiclk", "apb_pclk"; > > dmas = <&dmac 12>, <&dmac 13>; > > dma-names = "tx", "rx"; > > + num-cs = <2>; > > pinctrl-names = "default"; > > pinctrl-0 = <&spi0_clk &spi0_csn &spi0_miso &spi0_mosi>; > > #address-cells = <1>; > > @@ -647,6 +648,7 @@ spi1: spi@ff1d8000 { > > clock-names = "spiclk", "apb_pclk"; > > dmas = <&dmac 14>, <&dmac 15>; > > dma-names = "tx", "rx"; > > + num-cs = <2>; > > pinctrl-names = "default"; > > pinctrl-0 = <&spi1_clk &spi1_csn0 &spi1_csn1 &spi1_miso &spi1_mosi>; > > #address-cells = <1>; >
On Fri, 19 Jan 2024 11:16:56 +0100, Heiko Stuebner wrote: > From: Heiko Stuebner <heiko.stuebner@cherry.de> > > The px30 has two spi controllers with two chip-selects each. > The num-cs property is specified as the total number of chip > selects a controllers has and is used since 2020 to find uses > of chipselects outside that range in the Rockchip spi driver. > > [...] Applied, thanks! [1/1] arm64: dts: rockchip: set num-cs property for spi on px30 commit: 334bf0710c98d391f4067b72f535d6c4c84dfb6f Best regards,
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi index 42ce78beb413..20955556b624 100644 --- a/arch/arm64/boot/dts/rockchip/px30.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi @@ -632,6 +632,7 @@ spi0: spi@ff1d0000 { clock-names = "spiclk", "apb_pclk"; dmas = <&dmac 12>, <&dmac 13>; dma-names = "tx", "rx"; + num-cs = <2>; pinctrl-names = "default"; pinctrl-0 = <&spi0_clk &spi0_csn &spi0_miso &spi0_mosi>; #address-cells = <1>; @@ -647,6 +648,7 @@ spi1: spi@ff1d8000 { clock-names = "spiclk", "apb_pclk"; dmas = <&dmac 14>, <&dmac 15>; dma-names = "tx", "rx"; + num-cs = <2>; pinctrl-names = "default"; pinctrl-0 = <&spi1_clk &spi1_csn0 &spi1_csn1 &spi1_miso &spi1_mosi>; #address-cells = <1>;