From patchwork Fri Jan 19 10:45:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 13523574 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 768ACC4725D for ; Fri, 19 Jan 2024 10:46:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=C/SZXpTHEfM+qZB957Yca5qpaSQnml1V8IA4rpb4XcA=; b=B6h3Seak970+ZT VJsJeWy62h8owrR2frlEfAWyuTncUgCdtR89slurR6YDXCnA9AVyyviZHiGvSRqa3hlCl7doCr+aI cRsU1HX6xdXgt/bwqM+G55XDmOF4f8+mPh4Fyga7S1ONq1GUe3YZxVKj0dyR3HOQZovPFtzsGgAUt 5UbrKpN37nqpsDjsPE9qGJtFnxf1F2I49xBZq6pWDAN5H1jwZ35Z7sf8kuOp/34WpNRNq1lJ5Czi2 KvDkTNxQ10y7w9oogm9wb0z4US9R/SqOdeGJNTQw9Fti/NzynPPpDdTYoh5Xq1258sxxQbQa/s4hZ NgqY0RpmvHEExf0XZtBQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rQmNV-0057Jp-2B; Fri, 19 Jan 2024 10:45:37 +0000 Received: from mail-wm1-x32b.google.com ([2a00:1450:4864:20::32b]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rQmNS-0057Hr-0Y for linux-arm-kernel@lists.infradead.org; Fri, 19 Jan 2024 10:45:35 +0000 Received: by mail-wm1-x32b.google.com with SMTP id 5b1f17b1804b1-40e913e3f03so7061905e9.3 for ; Fri, 19 Jan 2024 02:45:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1705661131; x=1706265931; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=HTC4DdEvy8g2SMCw/JI6FV7yDSpa07/4JczZdfD8XG0=; b=uNhw0SMbHlUJ0Jb2yYqoeTIRmDk9qwvjqjULinH4mNbtsMewEy41t7pDFVXS1+AQCh VMUMMpYka9cMMp4mdAnRv78fpkxqoz3MTWttmQvzaoH0xYs31yvSQYIZZVmInINz9etU CRZRRm2swvtURO0gTCIHRXY4LTJcL5tmYrb227kyj9dcLabJAKwpg1dpjZjIu50y6Nad IaD4BLNDw8RswDNGcNO2A4eaRoNuv3SwWueapHQzmrra+7nxK4mRXubGfk510SIMyrTP qa0zN+BmHGINmly6Fo+4Y/vEhAOCvPiqRIMeZROUcqzUJ6HGbyT/HRwQXN8SJUnBq4+s 93EQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705661131; x=1706265931; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HTC4DdEvy8g2SMCw/JI6FV7yDSpa07/4JczZdfD8XG0=; b=XbrKV6y8TaNE35LNOvAOSGxt1RHxXQmQpAoefKunKyFaCU00iYwqsasuTSMWuSnCD/ PxK+E94EZTgqKZghIYD1ePCzigiYtJ/oVvGYPEZlMB8Uv/PtgqHZ5xIftQfwURR6Ya7l 1UR4fGOairvWLhCJG42s8mDhX69YLLXUI/JZtEIAl2q36lL/a/KRZrB6+SwFRvrNIM5U R0pOcTR8RcGXbdS6tjqIAuj9IRBbK7OL6W/GYdOrNjQA0om8U0yCLUXxq0resd0f4Ucw aBFBZxtAdhE9/UJaBGY03ZaEox7H2W20wDWQ/MgVmhWfyeTs6oEbdEE+mIiXpbbP/XCE /7WA== X-Gm-Message-State: AOJu0YzmKyrD/h/h+1rqxc+EIpmpbcXc6SKOQYBv7XNWQQpB9HbljeNi 5FArPWUfOzHCmhtkX+qRSM5kgmmpF3ObicIhUMAkPjT8VFP1bJRuaaPXoixY41E= X-Google-Smtp-Source: AGHT+IFMYe0iBaJgLM0jN4384HDBV4gkQcxKrLQJyf9nqc8RpGHq9WbRuPOO/CoLSCk5Y4JF+E0+vA== X-Received: by 2002:a05:600c:3014:b0:40e:4870:d2a4 with SMTP id j20-20020a05600c301400b0040e4870d2a4mr1622675wmh.59.1705661131795; Fri, 19 Jan 2024 02:45:31 -0800 (PST) Received: from ta2.c.googlers.com.com (88.140.78.34.bc.googleusercontent.com. [34.78.140.88]) by smtp.gmail.com with ESMTPSA id fm16-20020a05600c0c1000b0040ea10178f3sm77470wmb.21.2024.01.19.02.45.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 Jan 2024 02:45:31 -0800 (PST) From: Tudor Ambarus To: gregkh@linuxfoundation.org, jirislaby@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Cc: alim.akhtar@samsung.com, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, andre.draszik@linaro.org, kernel-team@android.com, peter.griffin@linaro.org, semen.protsenko@linaro.org, willmcvicker@google.com, Tudor Ambarus , Krzysztof Kozlowski Subject: [PATCH v2 03/19] tty: serial: samsung: prepare for different IO types Date: Fri, 19 Jan 2024 10:45:10 +0000 Message-ID: <20240119104526.1221243-4-tudor.ambarus@linaro.org> X-Mailer: git-send-email 2.43.0.429.g432eaa2c6b-goog In-Reply-To: <20240119104526.1221243-1-tudor.ambarus@linaro.org> References: <20240119104526.1221243-1-tudor.ambarus@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240119_024534_212602_EC25D52E X-CRM114-Status: GOOD ( 16.34 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org GS101's Connectivity Peripheral blocks (peric0/1 blocks) which include the I3C and USI (I2C, SPI, UART) only allow 32-bit register accesses. If using 8-bit register accesses, a SError Interrupt is raised causing the system unusable. Instead of specifying the reg-io-width = 4 everywhere, for each node, the requirement should be deduced from the compatible. Prepare the samsung tty driver to allow IO types different than UPIO_MEM. ``struct uart_port::iotype`` is an unsigned char where all its 8 bits are exposed to uapi. We can't make NULL checks on it to verify if it's set, thus always set it from the driver's data. Use u8 for the ``iotype`` member of ``struct s3c24xx_uart_info`` to emphasize that the iotype is an 8 bit mask. Reviewed-by: Krzysztof Kozlowski Reviewed-by: Sam Protsenko Signed-off-by: Tudor Ambarus --- drivers/tty/serial/samsung_tty.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c index 6fdb32b83346..9d3767021f9c 100644 --- a/drivers/tty/serial/samsung_tty.c +++ b/drivers/tty/serial/samsung_tty.c @@ -84,6 +84,7 @@ struct s3c24xx_uart_info { unsigned long clksel_mask; unsigned long clksel_shift; unsigned long ucon_mask; + u8 iotype; /* uart port features */ @@ -1741,7 +1742,6 @@ static void s3c24xx_serial_init_port_default(int index) { spin_lock_init(&port->lock); - port->iotype = UPIO_MEM; port->uartclk = 0; port->fifosize = 16; port->flags = UPF_BOOT_AUTOCONF; @@ -1988,6 +1988,8 @@ static int s3c24xx_serial_probe(struct platform_device *pdev) break; } + ourport->port.iotype = ourport->info->iotype; + if (np) { of_property_read_u32(np, "samsung,uart-fifosize", &ourport->port.fifosize); @@ -2398,6 +2400,7 @@ static const struct s3c24xx_serial_drv_data s3c6400_serial_drv_data = { .name = "Samsung S3C6400 UART", .type = TYPE_S3C6400, .port_type = PORT_S3C6400, + .iotype = UPIO_MEM, .fifosize = 64, .has_divslot = 1, .rx_fifomask = S3C2440_UFSTAT_RXMASK, @@ -2427,6 +2430,7 @@ static const struct s3c24xx_serial_drv_data s5pv210_serial_drv_data = { .name = "Samsung S5PV210 UART", .type = TYPE_S3C6400, .port_type = PORT_S3C6400, + .iotype = UPIO_MEM, .has_divslot = 1, .rx_fifomask = S5PV210_UFSTAT_RXMASK, .rx_fifoshift = S5PV210_UFSTAT_RXSHIFT, @@ -2456,6 +2460,7 @@ static const struct s3c24xx_serial_drv_data s5pv210_serial_drv_data = { .name = "Samsung Exynos UART", \ .type = TYPE_S3C6400, \ .port_type = PORT_S3C6400, \ + .iotype = UPIO_MEM, \ .has_divslot = 1, \ .rx_fifomask = S5PV210_UFSTAT_RXMASK, \ .rx_fifoshift = S5PV210_UFSTAT_RXSHIFT, \ @@ -2516,6 +2521,7 @@ static const struct s3c24xx_serial_drv_data s5l_serial_drv_data = { .name = "Apple S5L UART", .type = TYPE_APPLE_S5L, .port_type = PORT_8250, + .iotype = UPIO_MEM, .fifosize = 16, .rx_fifomask = S3C2410_UFSTAT_RXMASK, .rx_fifoshift = S3C2410_UFSTAT_RXSHIFT, @@ -2545,6 +2551,7 @@ static const struct s3c24xx_serial_drv_data artpec8_serial_drv_data = { .name = "Axis ARTPEC-8 UART", .type = TYPE_S3C6400, .port_type = PORT_S3C6400, + .iotype = UPIO_MEM, .fifosize = 64, .has_divslot = 1, .rx_fifomask = S5PV210_UFSTAT_RXMASK,