| Message ID | 20240119225257.403222-1-nmorrisson@phytec.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: dts: ti: Disable clock output of the ethernet PHY | expand |
Am 19.01.24 um 23:52 schrieb Nathan Morrisson: > The clock on the ethernet1 PHY is turned on by default. This turns > the clock off as we do not use it. > > Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com> Reviewed-by: Wadim Egorov <w.egorov@phytec.de> > --- > arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts b/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts > index 4bc0134c987d..3173f6eca7ca 100644 > --- a/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts > +++ b/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts > @@ -222,6 +222,7 @@ &cpsw3g_mdio { > cpsw3g_phy3: ethernet-phy@3 { > compatible = "ethernet-phy-id2000.a231", "ethernet-phy-ieee802.3-c22"; > reg = <3>; > + ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>; > ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; > ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; > };
Hi Nathan Morrisson, On Fri, 19 Jan 2024 14:52:57 -0800, Nathan Morrisson wrote: > The clock on the ethernet1 PHY is turned on by default. This turns > the clock off as we do not use it. > > I have applied the following to branch ti-k3-dts-next on [1]. Thank you! [1/1] arm64: dts: ti: Disable clock output of the ethernet PHY commit: f4ee6882ef25959f14c61aa76515fe301fa45a99 All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent up the chain during the next merge window (or sooner if it is a relevant bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. [1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git -- Vignesh
diff --git a/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts b/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts index 4bc0134c987d..3173f6eca7ca 100644 --- a/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts +++ b/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts @@ -222,6 +222,7 @@ &cpsw3g_mdio { cpsw3g_phy3: ethernet-phy@3 { compatible = "ethernet-phy-id2000.a231", "ethernet-phy-ieee802.3-c22"; reg = <3>; + ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>; ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; };
The clock on the ethernet1 PHY is turned on by default. This turns the clock off as we do not use it. Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com> --- arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts | 1 + 1 file changed, 1 insertion(+)