| Message ID | 20240122113045.1711818-4-danishanwar@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add AM64x ICSSG Ethernet support | expand |
On 22/01/2024 13:30, MD Danish Anwar wrote: > The am642-evm doesn't allow to enable 2 x CPSW3g ports and 2 x ICSSG1 ports > all together, so base k3-am642-evm.dts enables by default 2 x CPSW3g ports > and 1 x ICSSG1 ports, but it also possible to support 1 x CPSW3g ports and > 2 x ICSSG1 ports configuration. "it is also possible" OK so there can only be 3 ethernet ports on this board. There is no "ethernet3" alias. > > This patch adds overlay to support 1 x CPSW3g ports and 2 x ICSSG1 ports > configuration: > - Add label name 'mdio_mux_1' for 'mdio-mux-1' node so that the node > 'mdio-mux-1' can be disabled in the overlay using the label name. > - disable 2nd CPSW3g port > - update CPSW3g pinmuxes to not use RGMII2 > - disable mdio-mux-1 and define mdio-mux-2 to route ICSSG1 MDIO to the > shared DP83869 PHY > - add and enable ICSSG1 RGMII2 pinmuxes > - enable ICSSG1 MII1 port > > Signed-off-by: MD Danish Anwar <danishanwar@ti.com> > --- > arch/arm64/boot/dts/ti/Makefile | 5 ++ > .../dts/ti/k3-am642-evm-icssg1-dualemac.dtso | 75 +++++++++++++++++++ > arch/arm64/boot/dts/ti/k3-am642-evm.dts | 2 +- > 3 files changed, 81 insertions(+), 1 deletion(-) > create mode 100644 arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-dualemac.dtso > > diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile > index 52c1dc910308..320b2fae5730 100644 > --- a/arch/arm64/boot/dts/ti/Makefile > +++ b/arch/arm64/boot/dts/ti/Makefile > @@ -43,6 +43,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am642-sk.dtb > dtb-$(CONFIG_ARCH_K3) += k3-am642-tqma64xxl-mbax4xxl.dtb > dtb-$(CONFIG_ARCH_K3) += k3-am64-tqma64xxl-mbax4xxl-sdcard.dtbo > dtb-$(CONFIG_ARCH_K3) += k3-am64-tqma64xxl-mbax4xxl-wlan.dtbo > +dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-icssg1-dualemac.dtbo > > # Boards with AM65x SoC > k3-am654-gp-evm-dtbs := k3-am654-base-board.dtb k3-am654-base-board-rocktech-rk101-panel.dtbo > @@ -105,6 +106,8 @@ k3-am642-tqma64xxl-mbax4xxl-sdcard-dtbs := \ > k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-sdcard.dtbo > k3-am642-tqma64xxl-mbax4xxl-wlan-dtbs := \ > k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-wlan.dtbo > +k3-am642-evm-icssg1-dualemac-dtbs := \ > + k3-am642-evm.dtb k3-am642-evm-icssg1-dualemac.dtbo > k3-j721e-evm-pcie0-ep-dtbs := k3-j721e-common-proc-board.dtb \ > k3-j721e-evm-pcie0-ep.dtbo > k3-j721s2-evm-pcie1-ep-dtbs := k3-j721s2-common-proc-board.dtb \ > @@ -120,6 +123,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ > k3-am62a7-sk-csi2-ov5640.dtb \ > k3-am642-tqma64xxl-mbax4xxl-sdcard.dtb \ > k3-am642-tqma64xxl-mbax4xxl-wlan.dtb \ > + k3-am642-evm-icssg1-dualemac.dtb \ > k3-j721e-evm-pcie0-ep.dtb \ > k3-j721s2-evm-pcie1-ep.dtb > > @@ -129,6 +133,7 @@ DTC_FLAGS_k3-am625-sk += -@ > DTC_FLAGS_k3-am62-lp-sk += -@ > DTC_FLAGS_k3-am62a7-sk += -@ > DTC_FLAGS_k3-am642-tqma64xxl-mbax4xxl += -@ > +DTC_FLAGS_k3-am642-evm += -@ > DTC_FLAGS_k3-am6548-iot2050-advanced-m2 += -@ > DTC_FLAGS_k3-j721e-common-proc-board += -@ > DTC_FLAGS_k3-j721s2-common-proc-board += -@ > diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-dualemac.dtso b/arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-dualemac.dtso > new file mode 100644 > index 000000000000..b2b1a6252e73 > --- /dev/null > +++ b/arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-dualemac.dtso > @@ -0,0 +1,75 @@ > +// SPDX-License-Identifier: GPL-2.0 Don't you need to use updated licensing header like in the series [1] [1] https://lore.kernel.org/all/20240110140903.4090946-1-nm@ti.com/ > +/** > + * DT overlay for enabling 2nd ICSSG1 port on AM642 EVM > + * > + * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/ > + */ > + > +/dts-v1/; > +/plugin/; > + > +#include <dt-bindings/gpio/gpio.h> > +#include "k3-pinctrl.h" > + > +&{/} { You need to fixup alias for ethernet1 to icssg1_emac1? > + mdio-mux-2 { this should be mdio-mux@0 ? > + compatible = "mdio-mux-multiplexer"; > + mux-controls = <&mdio_mux>; > + mdio-parent-bus = <&icssg1_mdio>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + mdio@0 { > + reg = <0x0>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + icssg1_phy2: ethernet-phy@3 { > + reg = <3>; > + tx-internal-delay-ps = <250>; > + rx-internal-delay-ps = <2000>; > + }; > + }; > + }; > +}; > + > +&main_pmx0 { > + icssg1_rgmii2_pins_default: icssg1-rgmii2-default-pins { > + pinctrl-single,pins = < > + AM64X_IOPAD(0x0108, PIN_INPUT, 2) /* (W11) PRG1_PRU1_GPO0.RGMII2_RD0 */ > + AM64X_IOPAD(0x010c, PIN_INPUT, 2) /* (V11) PRG1_PRU1_GPO1.RGMII2_RD1 */ > + AM64X_IOPAD(0x0110, PIN_INPUT, 2) /* (AA12) PRG1_PRU1_GPO2.RGMII2_RD2 */ > + AM64X_IOPAD(0x0114, PIN_INPUT, 2) /* (Y12) PRG1_PRU1_GPO3.RGMII2_RD3 */ > + AM64X_IOPAD(0x0120, PIN_INPUT, 2) /* (U11) PRG1_PRU1_GPO6.RGMII2_RXC */ > + AM64X_IOPAD(0x0118, PIN_INPUT, 2) /* (W12) PRG1_PRU1_GPO4.RGMII2_RX_CTL */ > + AM64X_IOPAD(0x0134, PIN_OUTPUT, 2) /* (AA10) PRG1_PRU1_GPO11.RGMII2_TD0 */ > + AM64X_IOPAD(0x0138, PIN_OUTPUT, 2) /* (V10) PRG1_PRU1_GPO12.RGMII2_TD1 */ > + AM64X_IOPAD(0x013c, PIN_OUTPUT, 2) /* (U10) PRG1_PRU1_GPO13.RGMII2_TD2 */ > + AM64X_IOPAD(0x0140, PIN_OUTPUT, 2) /* (AA11) PRG1_PRU1_GPO14.RGMII2_TD3 */ > + AM64X_IOPAD(0x0148, PIN_OUTPUT, 2) /* (Y10) PRG1_PRU1_GPO16.RGMII2_TXC */ > + AM64X_IOPAD(0x0144, PIN_OUTPUT, 2) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */ > + >; > + }; > +}; > + > +&cpsw3g { > + pinctrl-0 = <&rgmii1_pins_default>; > +}; > + > +&cpsw_port2 { > + status = "disabled"; > +}; > + > +&mdio_mux_1 { > + status = "disabled"; > +}; > + > +&icssg1_eth { > + pinctrl-0 = <&icssg1_rgmii1_pins_default>, <&icssg1_rgmii2_pins_default>; > +}; > + > +&icssg1_emac1 { > + status = "okay"; > + phy-handle = <&icssg1_phy2>; > + phy-mode = "rgmii-id"; > +}; > diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts > index c08b0223be52..6ae43c12419f 100644 > --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts > +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts > @@ -200,7 +200,7 @@ mdio_mux: mux-controller { > mux-gpios = <&exp1 12 GPIO_ACTIVE_HIGH>; > }; > > - mdio-mux-1 { > + mdio_mux_1: mdio-mux-1 { mdio_mux_1: mdio-mux@1 > compatible = "mdio-mux-multiplexer"; > mux-controls = <&mdio_mux>; > mdio-parent-bus = <&cpsw3g_mdio>;
On 2/2/2024 5:56 PM, Roger Quadros wrote: > > > On 22/01/2024 13:30, MD Danish Anwar wrote: >> The am642-evm doesn't allow to enable 2 x CPSW3g ports and 2 x ICSSG1 ports >> all together, so base k3-am642-evm.dts enables by default 2 x CPSW3g ports >> and 1 x ICSSG1 ports, but it also possible to support 1 x CPSW3g ports and >> 2 x ICSSG1 ports configuration. > > "it is also possible" > > OK so there can only be 3 ethernet ports on this board. There is no "ethernet3" alias. > Yes maximum there can be 3 ports only. By default 2 are cpsw and 1 icssg but this parch introduces overlay to change the muxed port into icssg. By default, ethernet0 = &cpsw_port1; ethernet1 = &cpsw_port2; ethernet2 = &icssg1_emac0; When this overlay is applied, it should be something like this, ethernet0 = &cpsw_port1; ethernet1 = &icssg1_emac0; ethernet2 = &icssg1_emac1; Let me know if this looks ok to you. I will modify the alias accordingly. >> >> This patch adds overlay to support 1 x CPSW3g ports and 2 x ICSSG1 ports >> configuration: >> - Add label name 'mdio_mux_1' for 'mdio-mux-1' node so that the node >> 'mdio-mux-1' can be disabled in the overlay using the label name. >> - disable 2nd CPSW3g port >> - update CPSW3g pinmuxes to not use RGMII2 >> - disable mdio-mux-1 and define mdio-mux-2 to route ICSSG1 MDIO to the >> shared DP83869 PHY >> - add and enable ICSSG1 RGMII2 pinmuxes >> - enable ICSSG1 MII1 port >> >> Signed-off-by: MD Danish Anwar <danishanwar@ti.com> >> --- >> arch/arm64/boot/dts/ti/Makefile | 5 ++ >> .../dts/ti/k3-am642-evm-icssg1-dualemac.dtso | 75 +++++++++++++++++++ >> arch/arm64/boot/dts/ti/k3-am642-evm.dts | 2 +- >> 3 files changed, 81 insertions(+), 1 deletion(-) >> create mode 100644 arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-dualemac.dtso >> >> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile >> index 52c1dc910308..320b2fae5730 100644 >> --- a/arch/arm64/boot/dts/ti/Makefile >> +++ b/arch/arm64/boot/dts/ti/Makefile >> @@ -43,6 +43,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am642-sk.dtb >> dtb-$(CONFIG_ARCH_K3) += k3-am642-tqma64xxl-mbax4xxl.dtb >> dtb-$(CONFIG_ARCH_K3) += k3-am64-tqma64xxl-mbax4xxl-sdcard.dtbo >> dtb-$(CONFIG_ARCH_K3) += k3-am64-tqma64xxl-mbax4xxl-wlan.dtbo >> +dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-icssg1-dualemac.dtbo >> >> # Boards with AM65x SoC >> k3-am654-gp-evm-dtbs := k3-am654-base-board.dtb k3-am654-base-board-rocktech-rk101-panel.dtbo >> @@ -105,6 +106,8 @@ k3-am642-tqma64xxl-mbax4xxl-sdcard-dtbs := \ >> k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-sdcard.dtbo >> k3-am642-tqma64xxl-mbax4xxl-wlan-dtbs := \ >> k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-wlan.dtbo >> +k3-am642-evm-icssg1-dualemac-dtbs := \ >> + k3-am642-evm.dtb k3-am642-evm-icssg1-dualemac.dtbo >> k3-j721e-evm-pcie0-ep-dtbs := k3-j721e-common-proc-board.dtb \ >> k3-j721e-evm-pcie0-ep.dtbo >> k3-j721s2-evm-pcie1-ep-dtbs := k3-j721s2-common-proc-board.dtb \ >> @@ -120,6 +123,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ >> k3-am62a7-sk-csi2-ov5640.dtb \ >> k3-am642-tqma64xxl-mbax4xxl-sdcard.dtb \ >> k3-am642-tqma64xxl-mbax4xxl-wlan.dtb \ >> + k3-am642-evm-icssg1-dualemac.dtb \ >> k3-j721e-evm-pcie0-ep.dtb \ >> k3-j721s2-evm-pcie1-ep.dtb >> >> @@ -129,6 +133,7 @@ DTC_FLAGS_k3-am625-sk += -@ >> DTC_FLAGS_k3-am62-lp-sk += -@ >> DTC_FLAGS_k3-am62a7-sk += -@ >> DTC_FLAGS_k3-am642-tqma64xxl-mbax4xxl += -@ >> +DTC_FLAGS_k3-am642-evm += -@ >> DTC_FLAGS_k3-am6548-iot2050-advanced-m2 += -@ >> DTC_FLAGS_k3-j721e-common-proc-board += -@ >> DTC_FLAGS_k3-j721s2-common-proc-board += -@ >> diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-dualemac.dtso b/arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-dualemac.dtso >> new file mode 100644 >> index 000000000000..b2b1a6252e73 >> --- /dev/null >> +++ b/arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-dualemac.dtso >> @@ -0,0 +1,75 @@ >> +// SPDX-License-Identifier: GPL-2.0 > > Don't you need to use updated licensing header like in the series [1] > > [1] https://lore.kernel.org/all/20240110140903.4090946-1-nm@ti.com/ > Sure. I will update the header. >> +/** >> + * DT overlay for enabling 2nd ICSSG1 port on AM642 EVM >> + * >> + * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/ >> + */ >> + >> +/dts-v1/; >> +/plugin/; >> + >> +#include <dt-bindings/gpio/gpio.h> >> +#include "k3-pinctrl.h" >> + >> +&{/} { > > You need to fixup alias for ethernet1 to icssg1_emac1? > Yes I will update the aliases accordingly. >> + mdio-mux-2 { > > this should be mdio-mux@0 ? > The main mux in evm dts is defined as mdio-mux-1 so I was following the same. I will change this to mdio-mux@0 >> + compatible = "mdio-mux-multiplexer"; >> + mux-controls = <&mdio_mux>; >> + mdio-parent-bus = <&icssg1_mdio>; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + mdio@0 { >> + reg = <0x0>; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + icssg1_phy2: ethernet-phy@3 { >> + reg = <3>; >> + tx-internal-delay-ps = <250>; >> + rx-internal-delay-ps = <2000>; >> + }; >> + }; >> + }; >> +}; >> + >> +&main_pmx0 { >> + icssg1_rgmii2_pins_default: icssg1-rgmii2-default-pins { >> + pinctrl-single,pins = < >> + AM64X_IOPAD(0x0108, PIN_INPUT, 2) /* (W11) PRG1_PRU1_GPO0.RGMII2_RD0 */ >> + AM64X_IOPAD(0x010c, PIN_INPUT, 2) /* (V11) PRG1_PRU1_GPO1.RGMII2_RD1 */ >> + AM64X_IOPAD(0x0110, PIN_INPUT, 2) /* (AA12) PRG1_PRU1_GPO2.RGMII2_RD2 */ >> + AM64X_IOPAD(0x0114, PIN_INPUT, 2) /* (Y12) PRG1_PRU1_GPO3.RGMII2_RD3 */ >> + AM64X_IOPAD(0x0120, PIN_INPUT, 2) /* (U11) PRG1_PRU1_GPO6.RGMII2_RXC */ >> + AM64X_IOPAD(0x0118, PIN_INPUT, 2) /* (W12) PRG1_PRU1_GPO4.RGMII2_RX_CTL */ >> + AM64X_IOPAD(0x0134, PIN_OUTPUT, 2) /* (AA10) PRG1_PRU1_GPO11.RGMII2_TD0 */ >> + AM64X_IOPAD(0x0138, PIN_OUTPUT, 2) /* (V10) PRG1_PRU1_GPO12.RGMII2_TD1 */ >> + AM64X_IOPAD(0x013c, PIN_OUTPUT, 2) /* (U10) PRG1_PRU1_GPO13.RGMII2_TD2 */ >> + AM64X_IOPAD(0x0140, PIN_OUTPUT, 2) /* (AA11) PRG1_PRU1_GPO14.RGMII2_TD3 */ >> + AM64X_IOPAD(0x0148, PIN_OUTPUT, 2) /* (Y10) PRG1_PRU1_GPO16.RGMII2_TXC */ >> + AM64X_IOPAD(0x0144, PIN_OUTPUT, 2) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */ >> + >; >> + }; >> +}; >> + >> +&cpsw3g { >> + pinctrl-0 = <&rgmii1_pins_default>; >> +}; >> + >> +&cpsw_port2 { >> + status = "disabled"; >> +}; >> + >> +&mdio_mux_1 { >> + status = "disabled"; >> +}; >> + >> +&icssg1_eth { >> + pinctrl-0 = <&icssg1_rgmii1_pins_default>, <&icssg1_rgmii2_pins_default>; >> +}; >> + >> +&icssg1_emac1 { >> + status = "okay"; >> + phy-handle = <&icssg1_phy2>; >> + phy-mode = "rgmii-id"; >> +}; >> diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts >> index c08b0223be52..6ae43c12419f 100644 >> --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts >> +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts >> @@ -200,7 +200,7 @@ mdio_mux: mux-controller { >> mux-gpios = <&exp1 12 GPIO_ACTIVE_HIGH>; >> }; >> >> - mdio-mux-1 { >> + mdio_mux_1: mdio-mux-1 { > > mdio_mux_1: mdio-mux@1 > Sure. I will update this. >> compatible = "mdio-mux-multiplexer"; >> mux-controls = <&mdio_mux>; >> mdio-parent-bus = <&cpsw3g_mdio>; >
On 02/02/2024 18:50, Anwar, Md Danish wrote: > On 2/2/2024 5:56 PM, Roger Quadros wrote: >> >> >> On 22/01/2024 13:30, MD Danish Anwar wrote: >>> The am642-evm doesn't allow to enable 2 x CPSW3g ports and 2 x ICSSG1 ports >>> all together, so base k3-am642-evm.dts enables by default 2 x CPSW3g ports >>> and 1 x ICSSG1 ports, but it also possible to support 1 x CPSW3g ports and >>> 2 x ICSSG1 ports configuration. >> >> "it is also possible" >> >> OK so there can only be 3 ethernet ports on this board. There is no "ethernet3" alias. >> > > Yes maximum there can be 3 ports only. By default 2 are cpsw and 1 icssg > but this parch introduces overlay to change the muxed port into icssg. > > By default, > ethernet0 = &cpsw_port1; > ethernet1 = &cpsw_port2; > ethernet2 = &icssg1_emac0; > > When this overlay is applied, it should be something like this, > ethernet0 = &cpsw_port1; > ethernet1 = &icssg1_emac0; > ethernet2 = &icssg1_emac1; > > Let me know if this looks ok to you. I will modify the alias accordingly. ethernet0 is ok As per schematics: icssg1_emac0 is fixed to J21A port. so I'd call this ethernet1 J21B port can be switched between cpsw_port2 and icssg1_emac1. so I'd call this ethernet2 This way ethernet1 definition is fixed regardless and you are only switching ethernet2 definition. > >>> >>> This patch adds overlay to support 1 x CPSW3g ports and 2 x ICSSG1 ports >>> configuration: >>> - Add label name 'mdio_mux_1' for 'mdio-mux-1' node so that the node >>> 'mdio-mux-1' can be disabled in the overlay using the label name. >>> - disable 2nd CPSW3g port >>> - update CPSW3g pinmuxes to not use RGMII2 >>> - disable mdio-mux-1 and define mdio-mux-2 to route ICSSG1 MDIO to the >>> shared DP83869 PHY >>> - add and enable ICSSG1 RGMII2 pinmuxes >>> - enable ICSSG1 MII1 port >>> >>> Signed-off-by: MD Danish Anwar <danishanwar@ti.com> >>> --- >>> arch/arm64/boot/dts/ti/Makefile | 5 ++ >>> .../dts/ti/k3-am642-evm-icssg1-dualemac.dtso | 75 +++++++++++++++++++ >>> arch/arm64/boot/dts/ti/k3-am642-evm.dts | 2 +- >>> 3 files changed, 81 insertions(+), 1 deletion(-) >>> create mode 100644 arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-dualemac.dtso >>> >>> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile >>> index 52c1dc910308..320b2fae5730 100644 >>> --- a/arch/arm64/boot/dts/ti/Makefile >>> +++ b/arch/arm64/boot/dts/ti/Makefile >>> @@ -43,6 +43,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am642-sk.dtb >>> dtb-$(CONFIG_ARCH_K3) += k3-am642-tqma64xxl-mbax4xxl.dtb >>> dtb-$(CONFIG_ARCH_K3) += k3-am64-tqma64xxl-mbax4xxl-sdcard.dtbo >>> dtb-$(CONFIG_ARCH_K3) += k3-am64-tqma64xxl-mbax4xxl-wlan.dtbo >>> +dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-icssg1-dualemac.dtbo >>> >>> # Boards with AM65x SoC >>> k3-am654-gp-evm-dtbs := k3-am654-base-board.dtb k3-am654-base-board-rocktech-rk101-panel.dtbo >>> @@ -105,6 +106,8 @@ k3-am642-tqma64xxl-mbax4xxl-sdcard-dtbs := \ >>> k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-sdcard.dtbo >>> k3-am642-tqma64xxl-mbax4xxl-wlan-dtbs := \ >>> k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-wlan.dtbo >>> +k3-am642-evm-icssg1-dualemac-dtbs := \ >>> + k3-am642-evm.dtb k3-am642-evm-icssg1-dualemac.dtbo >>> k3-j721e-evm-pcie0-ep-dtbs := k3-j721e-common-proc-board.dtb \ >>> k3-j721e-evm-pcie0-ep.dtbo >>> k3-j721s2-evm-pcie1-ep-dtbs := k3-j721s2-common-proc-board.dtb \ >>> @@ -120,6 +123,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ >>> k3-am62a7-sk-csi2-ov5640.dtb \ >>> k3-am642-tqma64xxl-mbax4xxl-sdcard.dtb \ >>> k3-am642-tqma64xxl-mbax4xxl-wlan.dtb \ >>> + k3-am642-evm-icssg1-dualemac.dtb \ >>> k3-j721e-evm-pcie0-ep.dtb \ >>> k3-j721s2-evm-pcie1-ep.dtb >>> >>> @@ -129,6 +133,7 @@ DTC_FLAGS_k3-am625-sk += -@ >>> DTC_FLAGS_k3-am62-lp-sk += -@ >>> DTC_FLAGS_k3-am62a7-sk += -@ >>> DTC_FLAGS_k3-am642-tqma64xxl-mbax4xxl += -@ >>> +DTC_FLAGS_k3-am642-evm += -@ >>> DTC_FLAGS_k3-am6548-iot2050-advanced-m2 += -@ >>> DTC_FLAGS_k3-j721e-common-proc-board += -@ >>> DTC_FLAGS_k3-j721s2-common-proc-board += -@ >>> diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-dualemac.dtso b/arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-dualemac.dtso >>> new file mode 100644 >>> index 000000000000..b2b1a6252e73 >>> --- /dev/null >>> +++ b/arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-dualemac.dtso >>> @@ -0,0 +1,75 @@ >>> +// SPDX-License-Identifier: GPL-2.0 >> >> Don't you need to use updated licensing header like in the series [1] >> >> [1] https://lore.kernel.org/all/20240110140903.4090946-1-nm@ti.com/ >> > > Sure. I will update the header. > >>> +/** >>> + * DT overlay for enabling 2nd ICSSG1 port on AM642 EVM >>> + * >>> + * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/ >>> + */ >>> + >>> +/dts-v1/; >>> +/plugin/; >>> + >>> +#include <dt-bindings/gpio/gpio.h> >>> +#include "k3-pinctrl.h" >>> + >>> +&{/} { >> >> You need to fixup alias for ethernet1 to icssg1_emac1? >> > > Yes I will update the aliases accordingly. > >>> + mdio-mux-2 { >> >> this should be mdio-mux@0 ? >> > > The main mux in evm dts is defined as mdio-mux-1 so I was following the > same. I will change this to mdio-mux@0 > >>> + compatible = "mdio-mux-multiplexer"; >>> + mux-controls = <&mdio_mux>; >>> + mdio-parent-bus = <&icssg1_mdio>; >>> + #address-cells = <1>; >>> + #size-cells = <0>; >>> + >>> + mdio@0 { >>> + reg = <0x0>; >>> + #address-cells = <1>; >>> + #size-cells = <0>; >>> + >>> + icssg1_phy2: ethernet-phy@3 { >>> + reg = <3>; >>> + tx-internal-delay-ps = <250>; >>> + rx-internal-delay-ps = <2000>; >>> + }; >>> + }; >>> + }; >>> +}; >>> + >>> +&main_pmx0 { >>> + icssg1_rgmii2_pins_default: icssg1-rgmii2-default-pins { >>> + pinctrl-single,pins = < >>> + AM64X_IOPAD(0x0108, PIN_INPUT, 2) /* (W11) PRG1_PRU1_GPO0.RGMII2_RD0 */ >>> + AM64X_IOPAD(0x010c, PIN_INPUT, 2) /* (V11) PRG1_PRU1_GPO1.RGMII2_RD1 */ >>> + AM64X_IOPAD(0x0110, PIN_INPUT, 2) /* (AA12) PRG1_PRU1_GPO2.RGMII2_RD2 */ >>> + AM64X_IOPAD(0x0114, PIN_INPUT, 2) /* (Y12) PRG1_PRU1_GPO3.RGMII2_RD3 */ >>> + AM64X_IOPAD(0x0120, PIN_INPUT, 2) /* (U11) PRG1_PRU1_GPO6.RGMII2_RXC */ >>> + AM64X_IOPAD(0x0118, PIN_INPUT, 2) /* (W12) PRG1_PRU1_GPO4.RGMII2_RX_CTL */ >>> + AM64X_IOPAD(0x0134, PIN_OUTPUT, 2) /* (AA10) PRG1_PRU1_GPO11.RGMII2_TD0 */ >>> + AM64X_IOPAD(0x0138, PIN_OUTPUT, 2) /* (V10) PRG1_PRU1_GPO12.RGMII2_TD1 */ >>> + AM64X_IOPAD(0x013c, PIN_OUTPUT, 2) /* (U10) PRG1_PRU1_GPO13.RGMII2_TD2 */ >>> + AM64X_IOPAD(0x0140, PIN_OUTPUT, 2) /* (AA11) PRG1_PRU1_GPO14.RGMII2_TD3 */ >>> + AM64X_IOPAD(0x0148, PIN_OUTPUT, 2) /* (Y10) PRG1_PRU1_GPO16.RGMII2_TXC */ >>> + AM64X_IOPAD(0x0144, PIN_OUTPUT, 2) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */ >>> + >; >>> + }; >>> +}; >>> + >>> +&cpsw3g { >>> + pinctrl-0 = <&rgmii1_pins_default>; >>> +}; >>> + >>> +&cpsw_port2 { >>> + status = "disabled"; >>> +}; >>> + >>> +&mdio_mux_1 { >>> + status = "disabled"; >>> +}; >>> + >>> +&icssg1_eth { >>> + pinctrl-0 = <&icssg1_rgmii1_pins_default>, <&icssg1_rgmii2_pins_default>; >>> +}; >>> + >>> +&icssg1_emac1 { >>> + status = "okay"; >>> + phy-handle = <&icssg1_phy2>; >>> + phy-mode = "rgmii-id"; >>> +}; >>> diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts >>> index c08b0223be52..6ae43c12419f 100644 >>> --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts >>> +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts >>> @@ -200,7 +200,7 @@ mdio_mux: mux-controller { >>> mux-gpios = <&exp1 12 GPIO_ACTIVE_HIGH>; >>> }; >>> >>> - mdio-mux-1 { >>> + mdio_mux_1: mdio-mux-1 { >> >> mdio_mux_1: mdio-mux@1 >> > > Sure. I will update this. > >>> compatible = "mdio-mux-multiplexer"; >>> mux-controls = <&mdio_mux>; >>> mdio-parent-bus = <&cpsw3g_mdio>; >> >
On 05/02/24 6:27 pm, Roger Quadros wrote: > > > On 02/02/2024 18:50, Anwar, Md Danish wrote: >> On 2/2/2024 5:56 PM, Roger Quadros wrote: >>> >>> >>> On 22/01/2024 13:30, MD Danish Anwar wrote: >>>> The am642-evm doesn't allow to enable 2 x CPSW3g ports and 2 x ICSSG1 ports >>>> all together, so base k3-am642-evm.dts enables by default 2 x CPSW3g ports >>>> and 1 x ICSSG1 ports, but it also possible to support 1 x CPSW3g ports and >>>> 2 x ICSSG1 ports configuration. >>> >>> "it is also possible" >>> >>> OK so there can only be 3 ethernet ports on this board. There is no "ethernet3" alias. >>> >> >> Yes maximum there can be 3 ports only. By default 2 are cpsw and 1 icssg >> but this parch introduces overlay to change the muxed port into icssg. >> >> By default, >> ethernet0 = &cpsw_port1; >> ethernet1 = &cpsw_port2; >> ethernet2 = &icssg1_emac0; >> >> When this overlay is applied, it should be something like this, >> ethernet0 = &cpsw_port1; >> ethernet1 = &icssg1_emac0; >> ethernet2 = &icssg1_emac1; >> >> Let me know if this looks ok to you. I will modify the alias accordingly. > > ethernet0 is ok > > As per schematics: icssg1_emac0 is fixed to J21A port. so I'd call this ethernet1 > > J21B port can be switched between cpsw_port2 and icssg1_emac1. so I'd call this ethernet2 > > This way ethernet1 definition is fixed regardless and you are only switching ethernet2 > definition. > So ethernet0 and ethernet1 will be fixed and only ethernet2 will change from cpsw_port2 to icssg1_emac1 when this overlay is applied. I have posted v4 [1] before your this reply. In v4 I have kept ethernet0 and ethernet2 fixed to cpsw_port1 and icssg1_emac0 respectively and only ethernet1 changes from cpsw_port2 to icssg1_emac1 when this overlay is applied. Overlay only changes ethernet1. I think this is also a valid approach. eth0 will be fixed to cpsw and eth2 will be fixed to icssg. eth1 will toggle between cpsw and icssg. You can have a look at v4. Pls let me know if you are okay with this. [1] https://lore.kernel.org/all/20240205090546.4000446-1-danishanwar@ti.com/ >> >>>> >>>> This patch adds overlay to support 1 x CPSW3g ports and 2 x ICSSG1 ports >>>> configuration: >>>> - Add label name 'mdio_mux_1' for 'mdio-mux-1' node so that the node >>>> 'mdio-mux-1' can be disabled in the overlay using the label name. >>>> - disable 2nd CPSW3g port >>>> - update CPSW3g pinmuxes to not use RGMII2 >>>> - disable mdio-mux-1 and define mdio-mux-2 to route ICSSG1 MDIO to the >>>> shared DP83869 PHY >>>> - add and enable ICSSG1 RGMII2 pinmuxes >>>> - enable ICSSG1 MII1 port >>>> >>>> Signed-off-by: MD Danish Anwar <danishanwar@ti.com> >>>> --- >>>> arch/arm64/boot/dts/ti/Makefile | 5 ++ >>>> .../dts/ti/k3-am642-evm-icssg1-dualemac.dtso | 75 +++++++++++++++++++ >>>> arch/arm64/boot/dts/ti/k3-am642-evm.dts | 2 +- >>>> 3 files changed, 81 insertions(+), 1 deletion(-) >>>> create mode 100644 arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-dualemac.dtso >>>> >>>> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile >>>> index 52c1dc910308..320b2fae5730 100644 >>>> --- a/arch/arm64/boot/dts/ti/Makefile >>>> +++ b/arch/arm64/boot/dts/ti/Makefile >>>> @@ -43,6 +43,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am642-sk.dtb >>>> dtb-$(CONFIG_ARCH_K3) += k3-am642-tqma64xxl-mbax4xxl.dtb >>>> dtb-$(CONFIG_ARCH_K3) += k3-am64-tqma64xxl-mbax4xxl-sdcard.dtbo >>>> dtb-$(CONFIG_ARCH_K3) += k3-am64-tqma64xxl-mbax4xxl-wlan.dtbo >>>> +dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-icssg1-dualemac.dtbo >>>> >>>> # Boards with AM65x SoC >>>> k3-am654-gp-evm-dtbs := k3-am654-base-board.dtb k3-am654-base-board-rocktech-rk101-panel.dtbo >>>> @@ -105,6 +106,8 @@ k3-am642-tqma64xxl-mbax4xxl-sdcard-dtbs := \ >>>> k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-sdcard.dtbo >>>> k3-am642-tqma64xxl-mbax4xxl-wlan-dtbs := \ >>>> k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-wlan.dtbo >>>> +k3-am642-evm-icssg1-dualemac-dtbs := \ >>>> + k3-am642-evm.dtb k3-am642-evm-icssg1-dualemac.dtbo >>>> k3-j721e-evm-pcie0-ep-dtbs := k3-j721e-common-proc-board.dtb \ >>>> k3-j721e-evm-pcie0-ep.dtbo >>>> k3-j721s2-evm-pcie1-ep-dtbs := k3-j721s2-common-proc-board.dtb \ >>>> @@ -120,6 +123,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ >>>> k3-am62a7-sk-csi2-ov5640.dtb \ >>>> k3-am642-tqma64xxl-mbax4xxl-sdcard.dtb \ >>>> k3-am642-tqma64xxl-mbax4xxl-wlan.dtb \ >>>> + k3-am642-evm-icssg1-dualemac.dtb \ >>>> k3-j721e-evm-pcie0-ep.dtb \ >>>> k3-j721s2-evm-pcie1-ep.dtb >>>> >>>> @@ -129,6 +133,7 @@ DTC_FLAGS_k3-am625-sk += -@ >>>> DTC_FLAGS_k3-am62-lp-sk += -@ >>>> DTC_FLAGS_k3-am62a7-sk += -@ >>>> DTC_FLAGS_k3-am642-tqma64xxl-mbax4xxl += -@ >>>> +DTC_FLAGS_k3-am642-evm += -@ >>>> DTC_FLAGS_k3-am6548-iot2050-advanced-m2 += -@ >>>> DTC_FLAGS_k3-j721e-common-proc-board += -@ >>>> DTC_FLAGS_k3-j721s2-common-proc-board += -@ >>>> diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-dualemac.dtso b/arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-dualemac.dtso >>>> new file mode 100644 >>>> index 000000000000..b2b1a6252e73 >>>> --- /dev/null >>>> +++ b/arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-dualemac.dtso >>>> @@ -0,0 +1,75 @@ >>>> +// SPDX-License-Identifier: GPL-2.0 >>> >>> Don't you need to use updated licensing header like in the series [1] >>> >>> [1] https://lore.kernel.org/all/20240110140903.4090946-1-nm@ti.com/ >>> >> >> Sure. I will update the header. >> >>>> +/** >>>> + * DT overlay for enabling 2nd ICSSG1 port on AM642 EVM >>>> + * >>>> + * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/ >>>> + */ >>>> + >>>> +/dts-v1/; >>>> +/plugin/; >>>> + >>>> +#include <dt-bindings/gpio/gpio.h> >>>> +#include "k3-pinctrl.h" >>>> + >>>> +&{/} { >>> >>> You need to fixup alias for ethernet1 to icssg1_emac1? >>> >> >> Yes I will update the aliases accordingly. >> >>>> + mdio-mux-2 { >>> >>> this should be mdio-mux@0 ? >>> >> >> The main mux in evm dts is defined as mdio-mux-1 so I was following the >> same. I will change this to mdio-mux@0 >> >>>> + compatible = "mdio-mux-multiplexer"; >>>> + mux-controls = <&mdio_mux>; >>>> + mdio-parent-bus = <&icssg1_mdio>; >>>> + #address-cells = <1>; >>>> + #size-cells = <0>; >>>> + >>>> + mdio@0 { >>>> + reg = <0x0>; >>>> + #address-cells = <1>; >>>> + #size-cells = <0>; >>>> + >>>> + icssg1_phy2: ethernet-phy@3 { >>>> + reg = <3>; >>>> + tx-internal-delay-ps = <250>; >>>> + rx-internal-delay-ps = <2000>; >>>> + }; >>>> + }; >>>> + }; >>>> +}; >>>> + >>>> +&main_pmx0 { >>>> + icssg1_rgmii2_pins_default: icssg1-rgmii2-default-pins { >>>> + pinctrl-single,pins = < >>>> + AM64X_IOPAD(0x0108, PIN_INPUT, 2) /* (W11) PRG1_PRU1_GPO0.RGMII2_RD0 */ >>>> + AM64X_IOPAD(0x010c, PIN_INPUT, 2) /* (V11) PRG1_PRU1_GPO1.RGMII2_RD1 */ >>>> + AM64X_IOPAD(0x0110, PIN_INPUT, 2) /* (AA12) PRG1_PRU1_GPO2.RGMII2_RD2 */ >>>> + AM64X_IOPAD(0x0114, PIN_INPUT, 2) /* (Y12) PRG1_PRU1_GPO3.RGMII2_RD3 */ >>>> + AM64X_IOPAD(0x0120, PIN_INPUT, 2) /* (U11) PRG1_PRU1_GPO6.RGMII2_RXC */ >>>> + AM64X_IOPAD(0x0118, PIN_INPUT, 2) /* (W12) PRG1_PRU1_GPO4.RGMII2_RX_CTL */ >>>> + AM64X_IOPAD(0x0134, PIN_OUTPUT, 2) /* (AA10) PRG1_PRU1_GPO11.RGMII2_TD0 */ >>>> + AM64X_IOPAD(0x0138, PIN_OUTPUT, 2) /* (V10) PRG1_PRU1_GPO12.RGMII2_TD1 */ >>>> + AM64X_IOPAD(0x013c, PIN_OUTPUT, 2) /* (U10) PRG1_PRU1_GPO13.RGMII2_TD2 */ >>>> + AM64X_IOPAD(0x0140, PIN_OUTPUT, 2) /* (AA11) PRG1_PRU1_GPO14.RGMII2_TD3 */ >>>> + AM64X_IOPAD(0x0148, PIN_OUTPUT, 2) /* (Y10) PRG1_PRU1_GPO16.RGMII2_TXC */ >>>> + AM64X_IOPAD(0x0144, PIN_OUTPUT, 2) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */ >>>> + >; >>>> + }; >>>> +}; >>>> + >>>> +&cpsw3g { >>>> + pinctrl-0 = <&rgmii1_pins_default>; >>>> +}; >>>> + >>>> +&cpsw_port2 { >>>> + status = "disabled"; >>>> +}; >>>> + >>>> +&mdio_mux_1 { >>>> + status = "disabled"; >>>> +}; >>>> + >>>> +&icssg1_eth { >>>> + pinctrl-0 = <&icssg1_rgmii1_pins_default>, <&icssg1_rgmii2_pins_default>; >>>> +}; >>>> + >>>> +&icssg1_emac1 { >>>> + status = "okay"; >>>> + phy-handle = <&icssg1_phy2>; >>>> + phy-mode = "rgmii-id"; >>>> +}; >>>> diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts >>>> index c08b0223be52..6ae43c12419f 100644 >>>> --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts >>>> +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts >>>> @@ -200,7 +200,7 @@ mdio_mux: mux-controller { >>>> mux-gpios = <&exp1 12 GPIO_ACTIVE_HIGH>; >>>> }; >>>> >>>> - mdio-mux-1 { >>>> + mdio_mux_1: mdio-mux-1 { >>> >>> mdio_mux_1: mdio-mux@1 >>> >> >> Sure. I will update this. >> >>>> compatible = "mdio-mux-multiplexer"; >>>> mux-controls = <&mdio_mux>; >>>> mdio-parent-bus = <&cpsw3g_mdio>; >>> >> >
Hi Roger, On 02/02/24 5:56 pm, Roger Quadros wrote: > > > On 22/01/2024 13:30, MD Danish Anwar wrote: >> The am642-evm doesn't allow to enable 2 x CPSW3g ports and 2 x ICSSG1 ports >> all together, so base k3-am642-evm.dts enables by default 2 x CPSW3g ports >> and 1 x ICSSG1 ports, but it also possible to support 1 x CPSW3g ports and >> 2 x ICSSG1 ports configuration. > > "it is also possible" > > OK so there can only be 3 ethernet ports on this board. There is no "ethernet3" alias. > >> >> This patch adds overlay to support 1 x CPSW3g ports and 2 x ICSSG1 ports >> configuration: >> - Add label name 'mdio_mux_1' for 'mdio-mux-1' node so that the node >> 'mdio-mux-1' can be disabled in the overlay using the label name. >> - disable 2nd CPSW3g port >> - update CPSW3g pinmuxes to not use RGMII2 >> - disable mdio-mux-1 and define mdio-mux-2 to route ICSSG1 MDIO to the >> shared DP83869 PHY >> - add and enable ICSSG1 RGMII2 pinmuxes >> - enable ICSSG1 MII1 port >> >> Signed-off-by: MD Danish Anwar <danishanwar@ti.com> >> --- >> arch/arm64/boot/dts/ti/Makefile | 5 ++ >> .../dts/ti/k3-am642-evm-icssg1-dualemac.dtso | 75 +++++++++++++++++++ >> arch/arm64/boot/dts/ti/k3-am642-evm.dts | 2 +- >> 3 files changed, 81 insertions(+), 1 deletion(-) >> create mode 100644 arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-dualemac.dtso >> >> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile >> index 52c1dc910308..320b2fae5730 100644 >> --- a/arch/arm64/boot/dts/ti/Makefile >> +++ b/arch/arm64/boot/dts/ti/Makefile >> @@ -43,6 +43,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am642-sk.dtb >> dtb-$(CONFIG_ARCH_K3) += k3-am642-tqma64xxl-mbax4xxl.dtb >> dtb-$(CONFIG_ARCH_K3) += k3-am64-tqma64xxl-mbax4xxl-sdcard.dtbo >> dtb-$(CONFIG_ARCH_K3) += k3-am64-tqma64xxl-mbax4xxl-wlan.dtbo >> +dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-icssg1-dualemac.dtbo >> >> # Boards with AM65x SoC >> k3-am654-gp-evm-dtbs := k3-am654-base-board.dtb k3-am654-base-board-rocktech-rk101-panel.dtbo >> @@ -105,6 +106,8 @@ k3-am642-tqma64xxl-mbax4xxl-sdcard-dtbs := \ >> k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-sdcard.dtbo >> k3-am642-tqma64xxl-mbax4xxl-wlan-dtbs := \ >> k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-wlan.dtbo >> +k3-am642-evm-icssg1-dualemac-dtbs := \ >> + k3-am642-evm.dtb k3-am642-evm-icssg1-dualemac.dtbo >> k3-j721e-evm-pcie0-ep-dtbs := k3-j721e-common-proc-board.dtb \ >> k3-j721e-evm-pcie0-ep.dtbo >> k3-j721s2-evm-pcie1-ep-dtbs := k3-j721s2-common-proc-board.dtb \ >> @@ -120,6 +123,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ >> k3-am62a7-sk-csi2-ov5640.dtb \ >> k3-am642-tqma64xxl-mbax4xxl-sdcard.dtb \ >> k3-am642-tqma64xxl-mbax4xxl-wlan.dtb \ >> + k3-am642-evm-icssg1-dualemac.dtb \ >> k3-j721e-evm-pcie0-ep.dtb \ >> k3-j721s2-evm-pcie1-ep.dtb >> >> @@ -129,6 +133,7 @@ DTC_FLAGS_k3-am625-sk += -@ >> DTC_FLAGS_k3-am62-lp-sk += -@ >> DTC_FLAGS_k3-am62a7-sk += -@ >> DTC_FLAGS_k3-am642-tqma64xxl-mbax4xxl += -@ >> +DTC_FLAGS_k3-am642-evm += -@ >> DTC_FLAGS_k3-am6548-iot2050-advanced-m2 += -@ >> DTC_FLAGS_k3-j721e-common-proc-board += -@ >> DTC_FLAGS_k3-j721s2-common-proc-board += -@ >> diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-dualemac.dtso b/arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-dualemac.dtso >> new file mode 100644 >> index 000000000000..b2b1a6252e73 >> --- /dev/null >> +++ b/arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-dualemac.dtso >> @@ -0,0 +1,75 @@ >> +// SPDX-License-Identifier: GPL-2.0 > > Don't you need to use updated licensing header like in the series [1] > > [1] https://lore.kernel.org/all/20240110140903.4090946-1-nm@ti.com/ > >> +/** >> + * DT overlay for enabling 2nd ICSSG1 port on AM642 EVM >> + * >> + * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/ >> + */ >> + >> +/dts-v1/; >> +/plugin/; >> + >> +#include <dt-bindings/gpio/gpio.h> >> +#include "k3-pinctrl.h" >> + >> +&{/} { > > You need to fixup alias for ethernet1 to icssg1_emac1? > >> + mdio-mux-2 { > > this should be mdio-mux@0 ? > >> + compatible = "mdio-mux-multiplexer"; >> + mux-controls = <&mdio_mux>; >> + mdio-parent-bus = <&icssg1_mdio>; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + mdio@0 { >> + reg = <0x0>; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + icssg1_phy2: ethernet-phy@3 { >> + reg = <3>; >> + tx-internal-delay-ps = <250>; >> + rx-internal-delay-ps = <2000>; >> + }; >> + }; >> + }; >> +}; >> + <snip> >> +}; >> diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts >> index c08b0223be52..6ae43c12419f 100644 >> --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts >> +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts >> @@ -200,7 +200,7 @@ mdio_mux: mux-controller { >> mux-gpios = <&exp1 12 GPIO_ACTIVE_HIGH>; >> }; >> >> - mdio-mux-1 { >> + mdio_mux_1: mdio-mux-1 { > > mdio_mux_1: mdio-mux@1 > Changing this from mdio-mux-1 to mdio-mux@1 is giving me erorr in DTBS_CHECK /home/danish/workspace/linux-next/arch/arm64/boot/dts/ti/k3-am642-evm.dtb: /: mdio-mux@1: 'anyOf' conditional failed, one must be fixed: 'reg' is a required property 'ranges' is a required property from schema $id: http://devicetree.org/schemas/root-node.yaml# The documentation of mdio-mux-multiplexer [1] also has example section with node name as -1 instead of @1. I don't think node should be renamed to mdio-mux@1. I hadn't done DTBS_CHECK earlier have already made this change in v4 [2]. I will revert back this change and keep the nodes as mdio-mux-1 and mdio-mux-2 in v5. Let me know if it's OK with you. [1] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/Documentation/devicetree/bindings/net/mdio-mux-multiplexer.yaml#n34 [2] https://lore.kernel.org/all/20240205090546.4000446-4-danishanwar@ti.com/ >> compatible = "mdio-mux-multiplexer"; >> mux-controls = <&mdio_mux>; >> mdio-parent-bus = <&cpsw3g_mdio>; >
diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 52c1dc910308..320b2fae5730 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -43,6 +43,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am642-sk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am642-tqma64xxl-mbax4xxl.dtb dtb-$(CONFIG_ARCH_K3) += k3-am64-tqma64xxl-mbax4xxl-sdcard.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am64-tqma64xxl-mbax4xxl-wlan.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-icssg1-dualemac.dtbo # Boards with AM65x SoC k3-am654-gp-evm-dtbs := k3-am654-base-board.dtb k3-am654-base-board-rocktech-rk101-panel.dtbo @@ -105,6 +106,8 @@ k3-am642-tqma64xxl-mbax4xxl-sdcard-dtbs := \ k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-sdcard.dtbo k3-am642-tqma64xxl-mbax4xxl-wlan-dtbs := \ k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-wlan.dtbo +k3-am642-evm-icssg1-dualemac-dtbs := \ + k3-am642-evm.dtb k3-am642-evm-icssg1-dualemac.dtbo k3-j721e-evm-pcie0-ep-dtbs := k3-j721e-common-proc-board.dtb \ k3-j721e-evm-pcie0-ep.dtbo k3-j721s2-evm-pcie1-ep-dtbs := k3-j721s2-common-proc-board.dtb \ @@ -120,6 +123,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am62a7-sk-csi2-ov5640.dtb \ k3-am642-tqma64xxl-mbax4xxl-sdcard.dtb \ k3-am642-tqma64xxl-mbax4xxl-wlan.dtb \ + k3-am642-evm-icssg1-dualemac.dtb \ k3-j721e-evm-pcie0-ep.dtb \ k3-j721s2-evm-pcie1-ep.dtb @@ -129,6 +133,7 @@ DTC_FLAGS_k3-am625-sk += -@ DTC_FLAGS_k3-am62-lp-sk += -@ DTC_FLAGS_k3-am62a7-sk += -@ DTC_FLAGS_k3-am642-tqma64xxl-mbax4xxl += -@ +DTC_FLAGS_k3-am642-evm += -@ DTC_FLAGS_k3-am6548-iot2050-advanced-m2 += -@ DTC_FLAGS_k3-j721e-common-proc-board += -@ DTC_FLAGS_k3-j721s2-common-proc-board += -@ diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-dualemac.dtso b/arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-dualemac.dtso new file mode 100644 index 000000000000..b2b1a6252e73 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-dualemac.dtso @@ -0,0 +1,75 @@ +// SPDX-License-Identifier: GPL-2.0 +/** + * DT overlay for enabling 2nd ICSSG1 port on AM642 EVM + * + * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/ + */ + +/dts-v1/; +/plugin/; + +#include <dt-bindings/gpio/gpio.h> +#include "k3-pinctrl.h" + +&{/} { + mdio-mux-2 { + compatible = "mdio-mux-multiplexer"; + mux-controls = <&mdio_mux>; + mdio-parent-bus = <&icssg1_mdio>; + #address-cells = <1>; + #size-cells = <0>; + + mdio@0 { + reg = <0x0>; + #address-cells = <1>; + #size-cells = <0>; + + icssg1_phy2: ethernet-phy@3 { + reg = <3>; + tx-internal-delay-ps = <250>; + rx-internal-delay-ps = <2000>; + }; + }; + }; +}; + +&main_pmx0 { + icssg1_rgmii2_pins_default: icssg1-rgmii2-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x0108, PIN_INPUT, 2) /* (W11) PRG1_PRU1_GPO0.RGMII2_RD0 */ + AM64X_IOPAD(0x010c, PIN_INPUT, 2) /* (V11) PRG1_PRU1_GPO1.RGMII2_RD1 */ + AM64X_IOPAD(0x0110, PIN_INPUT, 2) /* (AA12) PRG1_PRU1_GPO2.RGMII2_RD2 */ + AM64X_IOPAD(0x0114, PIN_INPUT, 2) /* (Y12) PRG1_PRU1_GPO3.RGMII2_RD3 */ + AM64X_IOPAD(0x0120, PIN_INPUT, 2) /* (U11) PRG1_PRU1_GPO6.RGMII2_RXC */ + AM64X_IOPAD(0x0118, PIN_INPUT, 2) /* (W12) PRG1_PRU1_GPO4.RGMII2_RX_CTL */ + AM64X_IOPAD(0x0134, PIN_OUTPUT, 2) /* (AA10) PRG1_PRU1_GPO11.RGMII2_TD0 */ + AM64X_IOPAD(0x0138, PIN_OUTPUT, 2) /* (V10) PRG1_PRU1_GPO12.RGMII2_TD1 */ + AM64X_IOPAD(0x013c, PIN_OUTPUT, 2) /* (U10) PRG1_PRU1_GPO13.RGMII2_TD2 */ + AM64X_IOPAD(0x0140, PIN_OUTPUT, 2) /* (AA11) PRG1_PRU1_GPO14.RGMII2_TD3 */ + AM64X_IOPAD(0x0148, PIN_OUTPUT, 2) /* (Y10) PRG1_PRU1_GPO16.RGMII2_TXC */ + AM64X_IOPAD(0x0144, PIN_OUTPUT, 2) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */ + >; + }; +}; + +&cpsw3g { + pinctrl-0 = <&rgmii1_pins_default>; +}; + +&cpsw_port2 { + status = "disabled"; +}; + +&mdio_mux_1 { + status = "disabled"; +}; + +&icssg1_eth { + pinctrl-0 = <&icssg1_rgmii1_pins_default>, <&icssg1_rgmii2_pins_default>; +}; + +&icssg1_emac1 { + status = "okay"; + phy-handle = <&icssg1_phy2>; + phy-mode = "rgmii-id"; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts index c08b0223be52..6ae43c12419f 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts @@ -200,7 +200,7 @@ mdio_mux: mux-controller { mux-gpios = <&exp1 12 GPIO_ACTIVE_HIGH>; }; - mdio-mux-1 { + mdio_mux_1: mdio-mux-1 { compatible = "mdio-mux-multiplexer"; mux-controls = <&mdio_mux>; mdio-parent-bus = <&cpsw3g_mdio>;
The am642-evm doesn't allow to enable 2 x CPSW3g ports and 2 x ICSSG1 ports all together, so base k3-am642-evm.dts enables by default 2 x CPSW3g ports and 1 x ICSSG1 ports, but it also possible to support 1 x CPSW3g ports and 2 x ICSSG1 ports configuration. This patch adds overlay to support 1 x CPSW3g ports and 2 x ICSSG1 ports configuration: - Add label name 'mdio_mux_1' for 'mdio-mux-1' node so that the node 'mdio-mux-1' can be disabled in the overlay using the label name. - disable 2nd CPSW3g port - update CPSW3g pinmuxes to not use RGMII2 - disable mdio-mux-1 and define mdio-mux-2 to route ICSSG1 MDIO to the shared DP83869 PHY - add and enable ICSSG1 RGMII2 pinmuxes - enable ICSSG1 MII1 port Signed-off-by: MD Danish Anwar <danishanwar@ti.com> --- arch/arm64/boot/dts/ti/Makefile | 5 ++ .../dts/ti/k3-am642-evm-icssg1-dualemac.dtso | 75 +++++++++++++++++++ arch/arm64/boot/dts/ti/k3-am642-evm.dts | 2 +- 3 files changed, 81 insertions(+), 1 deletion(-) create mode 100644 arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-dualemac.dtso