From patchwork Tue Jan 23 15:34:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 13527641 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F2DD1C47DDB for ; Tue, 23 Jan 2024 15:35:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=67MBL+n9BvlDZGz2BX5QD44AvpqOTmpDiM4NnkK/xRM=; b=YsNJh84ME5Dc7C 3rQXeynrOBC7WXZs2iaeZqZqyleAcvMWsOOI2DywHaBN8EIHmz0x2bBD6vsEAvRGT14JXIo+OGncI 8Wym4Ua0eV2JrVZJ9IJh8OCuig91nFGiZx53wO1Wh6xvgmiECp65/Vpw1mBpSEDZu9AXVTn6AY0dy rnxPXuTMXAZ7KJ1/XmqhZhPnHWhRpF6QTHyd4v6w9M41QTPZH3J3i9ff8cBYxyU86/eRPrjJpYisM t0FbJizhYsDGCXwFPsBDZ9NmPgdvVhqhtblm53cAd+NMZa01O+DWElNwa/6bP6b72Q3W/ngB+u4gX CvGuE4kKUzBLbSiL8r/A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rSIo8-00H3zc-1Y; Tue, 23 Jan 2024 15:35:24 +0000 Received: from mail-wm1-x333.google.com ([2a00:1450:4864:20::333]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rSInU-00H3Tc-2b for linux-arm-kernel@lists.infradead.org; Tue, 23 Jan 2024 15:34:46 +0000 Received: by mail-wm1-x333.google.com with SMTP id 5b1f17b1804b1-40ec34160baso1839635e9.1 for ; Tue, 23 Jan 2024 07:34:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706024082; x=1706628882; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=2H+4vxpbUIDd45rCzEN2Z22Mxunqggm4pG1DkoeAKqY=; b=BQ27qUdvmX/vs5XoeygqH2gNPHILvosegKM9eZDpfwpqYxtfyA7ppOHKFHSozDaGw9 2qzz+1L4L/cQgv+Mfbcm28Owlz2to7O0UN3fHeFWLWTY7UJGytEtdqZDWiMTNiRSMdRn okau+A7jWaf6yRhpbFqoKrs49Xvi0Jv2LreP9tqbwXjagxQoS1FPY2JugXAPoea34oPL OPEf87Cra/azROIWFLP/K9hFp8gm6AzP+AqgldzYWZo1ToFIEKiaLT/rBYvE1bJPqLfp 2hGTtSSJKd0UWA1bu1pwVB9pW3BEYBDk/GAxc1gakRA9JZMPRH8z4QPfJaXvY0Q9jTDe GW2g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706024082; x=1706628882; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=2H+4vxpbUIDd45rCzEN2Z22Mxunqggm4pG1DkoeAKqY=; b=lyYgIQeYP6C0pdCxhp2p9vfhmFjWuDc0wJ7Lbrl01TKk50nxKJOYfWzBEXPDPZpk+R OvDIRJB8hb2Qrqc2lQhU54a90v6BmTFB3iWfqCPWU+ci4CTgxPunkbA5ZTCvDGkK/QrF m87aI6mpWMKM6GXPbXEn0VvMfY1MWSLu0DAzdOAyRf0X0LY7giuvFtCdMaQ6pTx9dnji HMpAqaKYs8fK2eNc0kLP9NupHDLxOLNfyKbUwpreyAJ6/M2HhCKxoYXKP3BVD2zIAKgR be2t+XKobOd+7SstWMm/ynhVqmO90tKvRi8ACHtIwlTMfWcVnrXyr5b8q7YZfItupNfp E6dQ== X-Gm-Message-State: AOJu0YxswFQ3dj1+KNKAw3bM9WT5fcuf85/0Z1DTp0CPELpIDGUmv6uM lePLx89lkfQNTaMnb82gs8eFXpHbpgG7/NnvHxmgBVob/sCMeodBkD2UpRw8xpE= X-Google-Smtp-Source: AGHT+IEdhulGHnMoRApGote5ScptZ0DoCltZHEA7gddglwiHhXxlIDhI6CN7Ov1Zuk+CJc7AAijQ6g== X-Received: by 2002:a05:600c:4448:b0:40e:937f:16dc with SMTP id v8-20020a05600c444800b0040e937f16dcmr707423wmn.17.1706024082130; Tue, 23 Jan 2024 07:34:42 -0800 (PST) Received: from ta2.c.googlers.com.com (88.140.78.34.bc.googleusercontent.com. [34.78.140.88]) by smtp.gmail.com with ESMTPSA id p21-20020a05600c359500b0040e3488f16dsm42457536wmq.12.2024.01.23.07.34.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Jan 2024 07:34:41 -0800 (PST) From: Tudor Ambarus To: broonie@kernel.org, andi.shyti@kernel.org, arnd@arndb.de Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, alim.akhtar@samsung.com, linux-spi@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arch@vger.kernel.org, andre.draszik@linaro.org, peter.griffin@linaro.org, semen.protsenko@linaro.org, kernel-team@android.com, willmcvicker@google.com, Tudor Ambarus Subject: [PATCH 18/21] asm-generic/io.h: add iowrite{8,16}_32 accessors Date: Tue, 23 Jan 2024 15:34:17 +0000 Message-ID: <20240123153421.715951-19-tudor.ambarus@linaro.org> X-Mailer: git-send-email 2.43.0.429.g432eaa2c6b-goog In-Reply-To: <20240123153421.715951-1-tudor.ambarus@linaro.org> References: <20240123153421.715951-1-tudor.ambarus@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240123_073444_855252_F9382238 X-CRM114-Status: GOOD ( 10.14 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This will allow devices that require 32 bits register accesses to write data in chunks of 8 or 16 bits. One SoC that requires 32 bit register accesses is the google gs101. A typical use case is SPI, where the clients can request transfers in words of 8 bits. Signed-off-by: Tudor Ambarus --- include/asm-generic/io.h | 50 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/include/asm-generic/io.h b/include/asm-generic/io.h index bac63e874c7b..1e224d1ccc98 100644 --- a/include/asm-generic/io.h +++ b/include/asm-generic/io.h @@ -476,6 +476,21 @@ static inline void writesb(volatile void __iomem *addr, const void *buffer, } #endif +#ifndef writesb_l +#define writesb_l writesb_l +static inline void writesb_l(volatile void __iomem *addr, const void *buffer, + unsigned int count) +{ + if (count) { + const u8 *buf = buffer; + + do { + __raw_writel(*buf++, addr); + } while (--count); + } +} +#endif + #ifndef writesw #define writesw writesw static inline void writesw(volatile void __iomem *addr, const void *buffer, @@ -491,6 +506,21 @@ static inline void writesw(volatile void __iomem *addr, const void *buffer, } #endif +#ifndef writesw_l +#define writesw_l writesw_l +static inline void writesw_l(volatile void __iomem *addr, const void *buffer, + unsigned int count) +{ + if (count) { + const u16 *buf = buffer; + + do { + __raw_writel(*buf++, addr); + } while (--count); + } +} +#endif + #ifndef writesl #define writesl writesl static inline void writesl(volatile void __iomem *addr, const void *buffer, @@ -956,6 +986,16 @@ static inline void iowrite8_rep(volatile void __iomem *addr, } #endif +#ifndef iowrite8_32_rep +#define iowrite8_32_rep iowrite8_32_rep +static inline void iowrite8_32_rep(volatile void __iomem *addr, + const void *buffer, + unsigned int count) +{ + writesb_l(addr, buffer, count); +} +#endif + #ifndef iowrite16_rep #define iowrite16_rep iowrite16_rep static inline void iowrite16_rep(volatile void __iomem *addr, @@ -966,6 +1006,16 @@ static inline void iowrite16_rep(volatile void __iomem *addr, } #endif +#ifndef iowrite16_32_rep +#define iowrite16_32_rep iowrite16_32_rep +static inline void iowrite16_32_rep(volatile void __iomem *addr, + const void *buffer, + unsigned int count) +{ + writesw_l(addr, buffer, count); +} +#endif + #ifndef iowrite32_rep #define iowrite32_rep iowrite32_rep static inline void iowrite32_rep(volatile void __iomem *addr,