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[34.78.140.88]) by smtp.gmail.com with ESMTPSA id k10-20020a05600c1c8a00b0040e451fd602sm6287286wms.33.2024.01.26.09.16.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 09:16:07 -0800 (PST) From: Tudor Ambarus To: broonie@kernel.org, andi.shyti@kernel.org, semen.protsenko@linaro.org Cc: krzysztof.kozlowski@linaro.org, alim.akhtar@samsung.com, jassi.brar@samsung.com, linux-spi@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, andre.draszik@linaro.org, peter.griffin@linaro.org, kernel-team@android.com, willmcvicker@google.com, Tudor Ambarus Subject: [PATCH v3 16/17] spi: s3c64xx: drop a superfluous bitwise NOT operation Date: Fri, 26 Jan 2024 17:15:44 +0000 Message-ID: <20240126171546.1233172-17-tudor.ambarus@linaro.org> X-Mailer: git-send-email 2.43.0.429.g432eaa2c6b-goog In-Reply-To: <20240126171546.1233172-1-tudor.ambarus@linaro.org> References: <20240126171546.1233172-1-tudor.ambarus@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240126_091610_188747_CBF93D54 X-CRM114-Status: UNSURE ( 8.87 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org val &= ~mask; val |= mask; is equivalent to: val |= mask; Drop the superfluous bitwise NOT operation. Signed-off-by: Tudor Ambarus Reviewed-by: Sam Protsenko --- drivers/spi/spi-s3c64xx.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index e9344fe71e56..43b888c8812e 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c @@ -1089,7 +1089,6 @@ static void s3c64xx_spi_hwinit(struct s3c64xx_spi_driver_data *sdd) val = readl(regs + S3C64XX_SPI_MODE_CFG); val &= ~S3C64XX_SPI_MODE_4BURST; - val &= ~(S3C64XX_SPI_MAX_TRAILCNT << S3C64XX_SPI_TRAILCNT_OFF); val |= (S3C64XX_SPI_MAX_TRAILCNT << S3C64XX_SPI_TRAILCNT_OFF); writel(val, regs + S3C64XX_SPI_MODE_CFG);