From patchwork Sat Jan 27 04:04:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rohan G Thomas X-Patchwork-Id: 13533971 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2B409C46CD2 for ; Sat, 27 Jan 2024 04:05:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=clIN83dvF+Jf+oowArDfAe7huX1mhaJQ7930ryxbMCI=; b=R7g1UyX8JOHQ7P yGLFp6i15o5CDYx96/TfCRoDJWnMtOYx1NqIgKXIo7P0yRiCiDIg5ZpUMzQKaITRYOh1nOqSWujk6 cgRYToWzRgNvA01qTOKrBaxsTjr/zATWCHu8gcE4M2ec+cr53l6NDf0H8fHkt9GjUEZUWfMJZFueI c7Pa2AW9y8PsPb/Yoqd8nh6173Iq7E3sUKOdPr3/fE4ml1xQZkSfbegQ2Ng9sTx9yypWzN4Yuueni cRgYgopGm20Irr55zbCt28z6Z8PlFJPzM7SzMMR0GAbACSCaQYCEH7kWDalr8a3dWmI6aJHAF6zIx g1yPB/gHqi0h+74glLcg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rTZwu-00000006lY2-1vAZ; Sat, 27 Jan 2024 04:05:44 +0000 Received: from mgamail.intel.com ([192.55.52.115]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rTZwJ-00000006l1u-0ncD for linux-arm-kernel@lists.infradead.org; Sat, 27 Jan 2024 04:05:08 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1706328307; x=1737864307; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=eCcylmKuGhzpjVUqVE5u3nCimW0l3ydQAg3Bgrb9n4U=; b=CfIxG8NWEBSj6NkIl90iCENNmQ3Lftrnyb8B18PTozq7e1IrnB4mjZiR l/WzTXGcJVYbfAz9NpZ8psZYfsIQPZ9DzZSq0yhnyxT/jaaqH4fA2V+gv i5mtrW0sl6tFJe+mBldlxyAveDtTP78tO7mx+WrujLWx4zM0p0GwaZahH s16CrV+vK0i2QSqSUImRiVLA2UmVENkVKTasFdTXZcDO1CRYWmTSTBbYQ +IlnrsRjzFZxk/smzOr3KXLFyPN47a70O1pVUTMSSEA3dbEcAIjV+LCXd efkN/pVn7nT/FkMdXgih045x40eS3jjz6E+H6tLfRg3KTN7HXy9x4MtWv g==; X-IronPort-AV: E=McAfee;i="6600,9927,10964"; a="402289666" X-IronPort-AV: E=Sophos;i="6.05,220,1701158400"; d="scan'208";a="402289666" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Jan 2024 20:05:06 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10964"; a="787309861" X-IronPort-AV: E=Sophos;i="6.05,220,1701158400"; d="scan'208";a="787309861" Received: from ppglcf2090.png.intel.com ([10.126.160.96]) by orsmga002.jf.intel.com with ESMTP; 26 Jan 2024 20:05:00 -0800 From: Rohan G Thomas To: "David S . Miller" , Alexandre Torgue , Jose Abreu , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Giuseppe Cavallaro , Richard Cochran , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Serge Semin Cc: netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, bpf@vger.kernel.org, Rohan G Thomas Subject: [PATCH net-next 2/3] net: stmmac: est: Per Tx-queue error count for HLBF Date: Sat, 27 Jan 2024 12:04:42 +0800 Message-Id: <20240127040443.24835-3-rohan.g.thomas@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20240127040443.24835-1-rohan.g.thomas@intel.com> References: <20240127040443.24835-1-rohan.g.thomas@intel.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240126_200507_278892_A6471A84 X-CRM114-Status: GOOD ( 13.08 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Keep per Tx-queue error count on Head-Of-Line Blocking due to frame size(HLBF) error. The MAC raises HLBF error on one or more queues when none of the time Intervals of open-gates in the GCL is greater than or equal to the duration needed for frame transmission and by default drops those packets that causes HLBF error. EST_FRM_SZ_ERR register provides the One Hot encoded Queue numbers that have the Frame Size related error. Signed-off-by: Rohan G Thomas --- drivers/net/ethernet/stmicro/stmmac/common.h | 1 + drivers/net/ethernet/stmicro/stmmac/stmmac_est.c | 6 ++++++ 2 files changed, 7 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h b/drivers/net/ethernet/stmicro/stmmac/common.h index d8d2a90fd228..70bef7811c91 100644 --- a/drivers/net/ethernet/stmicro/stmmac/common.h +++ b/drivers/net/ethernet/stmicro/stmmac/common.h @@ -203,6 +203,7 @@ struct stmmac_extra_stats { unsigned long mtl_est_btre; unsigned long mtl_est_btrlm; unsigned long max_sdu_txq_drop[MTL_MAX_TX_QUEUES]; + unsigned long mtl_est_txq_hlbf[MTL_MAX_TX_QUEUES]; /* per queue statistics */ struct stmmac_txq_stats txq_stats[MTL_MAX_TX_QUEUES]; struct stmmac_rxq_stats rxq_stats[MTL_MAX_RX_QUEUES]; diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_est.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_est.c index 4da6ccc17c20..c9693f77e1f6 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_est.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_est.c @@ -81,6 +81,7 @@ static void est_irq_status(struct stmmac_priv *priv, struct net_device *dev, u32 status, value, feqn, hbfq, hbfs, btrl, btrl_max; void __iomem *est_addr = priv->estaddr; u32 txqcnt_mask = BIT(txqcnt) - 1; + int i; status = readl(est_addr + EST_STATUS); @@ -125,6 +126,11 @@ static void est_irq_status(struct stmmac_priv *priv, struct net_device *dev, x->mtl_est_hlbf++; + for (i = 0; i < txqcnt; i++) { + if (feqn & BIT(i)) + x->mtl_est_txq_hlbf[i]++; + } + /* Clear Interrupt */ writel(feqn, est_addr + EST_FRM_SZ_ERR);