diff mbox series

[v8,41/43] arm64: defconfig: Enable LPA2 support

Message ID	20240214122845.2033971-86-ardb+git@google.com (mailing list archive)
State	New, archived
Headers	show Return-Path: <linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org> Date: Wed, 14 Feb 2024 13:29:27 +0100 In-Reply-To: <20240214122845.2033971-45-ardb+git@google.com> Mime-Version: 1.0 References: <20240214122845.2033971-45-ardb+git@google.com> Message-ID: <20240214122845.2033971-86-ardb+git@google.com> Subject: [PATCH v8 41/43] arm64: defconfig: Enable LPA2 support From: Ard Biesheuvel <ardb+git@google.com> To: linux-arm-kernel@lists.infradead.org Cc: Ard Biesheuvel <ardb@kernel.org>, Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>, Mark Rutland <mark.rutland@arm.com>, Ryan Roberts <ryan.roberts@arm.com>, Anshuman Khandual <anshuman.khandual@arm.com>, Kees Cook <keescook@chromium.org> Precedence: list Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org> Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org
Series	arm64: Add support for LPA2 and WXN at stage 1 \| expand [v8,00/43] arm64: Add support for LPA2 and WXN at stage 1 [v8,01/43] arm64: kernel: Manage absolute relocations in code built under pi/ [v8,02/43] arm64: kernel: Don't rely on objcopy to make code under pi/ __init [v8,03/43] arm64: head: move relocation handling to C code [v8,04/43] arm64: idreg-override: Move to early mini C runtime [v8,05/43] arm64: kernel: Remove early fdt remap code [v8,06/43] arm64: head: Clear BSS and the kernel page tables in one go [v8,07/43] arm64: Move feature overrides into the BSS section [v8,08/43] arm64: head: Run feature override detection before mapping the kernel [v8,09/43] arm64: head: move dynamic shadow call stack patching into early C runtime [v8,10/43] arm64: cpufeature: Add helper to test for CPU feature overrides [v8,11/43] arm64: kaslr: Use feature override instead of parsing the cmdline again [v8,12/43] arm64: idreg-override: Create a pseudo feature for rodata=off [v8,13/43] arm64: Add helpers to probe local CPU for PAC and BTI support [v8,14/43] arm64: head: allocate more pages for the kernel mapping [v8,15/43] arm64: head: move memstart_offset_seed handling to C code [v8,16/43] arm64: mm: Make kaslr_requires_kpti() a static inline [v8,17/43] arm64: mmu: Make __cpu_replace_ttbr1() out of line [v8,18/43] arm64: head: Move early kernel mapping routines into C code [v8,19/43] arm64: mm: Use 48-bit virtual addressing for the permanent ID map [v8,20/43] arm64: pgtable: Decouple PGDIR size macros from PGD/PUD/PMD levels [v8,21/43] arm64: kernel: Create initial ID map from C code [v8,22/43] arm64: mm: avoid fixmap for early swapper_pg_dir updates [v8,23/43] arm64: mm: omit redundant remap of kernel image [v8,24/43] arm64: Revert "mm: provide idmap pointer to cpu_replace_ttbr1()" [v8,25/43] arm64: mm: Handle LVA support as a CPU feature [v8,26/43] arm64: mm: Add feature override support for LVA [v8,27/43] arm64: Avoid #define'ing PTE_MAYBE_NG to 0x0 for asm use [v8,28/43] arm64: Add ESR decoding for exceptions involving translation level -1 [v8,29/43] arm64: mm: Wire up TCR.DS bit to PTE shareability fields [v8,30/43] arm64: mm: Add LPA2 support to phys<->pte conversion routines [v8,31/43] arm64: mm: Add definitions to support 5 levels of paging [v8,32/43] arm64: mm: add LPA2 and 5 level paging support to G-to-nG conversion [v8,33/43] arm64: Enable LPA2 at boot if supported by the system [v8,34/43] arm64: mm: Add 5 level paging support to fixmap and swapper handling [v8,35/43] arm64: kasan: Reduce minimum shadow alignment and enable 5 level paging [v8,36/43] arm64: mm: Add support for folding PUDs at runtime [v8,37/43] arm64: ptdump: Disregard unaddressable VA space [v8,38/43] arm64: ptdump: Deal with translation levels folded at runtime [v8,39/43] arm64: kvm: avoid CONFIG_PGTABLE_LEVELS for runtime levels [v8,40/43] arm64: Enable 52-bit virtual addressing for 4k and 16k granule configs [v8,41/43] arm64: defconfig: Enable LPA2 support [v8,42/43] mm: add arch hook to validate mmap() prot flags [v8,43/43] arm64: mm: add support for WXN memory translation attribute

Commit Message

Ard Biesheuvel Feb. 14, 2024, 12:29 p.m. UTC

From: Ard Biesheuvel <ardb@kernel.org>

We typically enable support in defconfig for all architectural features
for which we can detect at runtime if the hardware actually supports
them.

Now that we have implemented support for LPA2 based 52-bit virtual
addressing in a way that should not impact 48-bit operation on non-LPA2
CPU, we can do the same, and enable 52-bit virtual addressing by
default.

Catalin adds:

  Currently the "Virtual address space size" arch/arm64/Kconfig menu
  entry sets different defaults for each page size. However, all are
  overridden by the defconfig to 48 bits. Set the new default in
  Kconfig and remove the defconfig line.

[ardb: squash follow-up fix from Catalin]
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
 arch/arm64/Kconfig           | 4 +---
 arch/arm64/configs/defconfig | 1 -
 2 files changed, 1 insertion(+), 4 deletions(-)

diff mbox series

Patch

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index eed8fef08a10..160856de9bbb 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -1283,9 +1283,7 @@  endchoice
 
 choice
 	prompt "Virtual address space size"
-	default ARM64_VA_BITS_39 if ARM64_4K_PAGES
-	default ARM64_VA_BITS_47 if ARM64_16K_PAGES
-	default ARM64_VA_BITS_42 if ARM64_64K_PAGES
+	default ARM64_VA_BITS_52
 	help
 	  Allows choosing one of multiple possible virtual address
 	  space sizes. The level of translation table is determined by
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index e6cf3e5d63c3..f086b0624ec8 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -76,7 +76,6 @@  CONFIG_ARCH_VEXPRESS=y
 CONFIG_ARCH_VISCONTI=y
 CONFIG_ARCH_XGENE=y
 CONFIG_ARCH_ZYNQMP=y
-CONFIG_ARM64_VA_BITS_48=y
 CONFIG_SCHED_MC=y
 CONFIG_SCHED_SMT=y
 CONFIG_NUMA=y