From patchwork Thu Feb 15 10:45:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Durai Manickam KR X-Patchwork-Id: 13558088 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4A52AC48BEB for ; Thu, 15 Feb 2024 10:46:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:CC:To:Message-ID:MIME-Version:Subject: Date:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=fZjHCyIzGV16VW8kYQSQPU3gxY3W+BaMDT4eqRg1Tcs=; b=IknsBjytEDZqsY 6CXfc5aNe7QYhk7Hac8vw0HXyHVqKoHkwH4GEkoZxx7RtmxNx7Tw+4yggmc9SN06P9Dy0N1dfaGzN m39cNitp/eyLdCTfMZZ0Uj0+ZGqLU/JX8nqev4kWvH3QzkkO5KyiluRqtlWg2oepuxe7FHnSfiK7f NbYShglUCpCvD0XenuPXfILT4Oo+i9iuNuqMHnaFueTZGS2VgRmaVnoiKwMLQI/3QqcvTlUd6H11J 1MFvMkVD7SWlfp6i7pljihnqg2WZgr5ieBZG0Y777r2XfX+gOD4lG2DP4W/fS1H3fa10008gk4zb7 AKsC6glRazZ9Ox20JicQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1raZGD-0000000Frr6-2IQ1; Thu, 15 Feb 2024 10:46:33 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1raZG7-0000000FrmU-2kIB for linux-arm-kernel@lists.infradead.org; Thu, 15 Feb 2024 10:46:30 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1707993987; x=1739529987; h=from:date:subject:mime-version:content-transfer-encoding: message-id:to:cc; bh=m1LjF1npWj8tCKHK1NcAZBpF2cD039mfR5VwBO1BovM=; b=dc1mwuC2cLuAkApJYJDDUjISgPF3i5yBC+CWuhThZKkU7v241UHZ9wTE cHcvbQKhPbfUrUkLrSEID9e4EnFx9VMmS0mBMwkePivk3JsUt4on6ivx7 cZ5B2TyxAokrsWWROWS92jbIBQDc9RrFBPGeXdcw2lgl6XZK9PsY6fbYm m8NvT4DOz0KRlf6+T+6tHMDkdrjLKq0Jo04ogL950iogILzkFVHb6Vblj 8Ag54F4QYL/GqtuP6B3cUlDwpeygzFhDE30ixKf364EQni79+2BBlqCbw qrVav77nqtDpMB50Sg4xyN3cOmss0mF7RSkY+UdCOGodBX6u8+utFe/yB A==; X-CSE-ConnectionGUID: sBOc7X1pTDaZ9glc9RjUSQ== X-CSE-MsgGUID: IeU7h4lfSoWKR0brJFk/NA== X-IronPort-AV: E=Sophos;i="6.06,161,1705388400"; d="scan'208";a="247024159" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 15 Feb 2024 03:46:24 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 15 Feb 2024 03:46:01 -0700 Received: from che-lt-i66125lx.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 15 Feb 2024 03:45:56 -0700 From: Durai Manickam KR Date: Thu, 15 Feb 2024 16:15:44 +0530 Subject: [PATCH] dt-bindings: dma: convert atmel-dma.txt to YAML MIME-Version: 1.0 Message-ID: <20240215-dmac-v1-1-8f1c6f031c98@microchip.com> X-B4-Tracking: v=1; b=H4sIAFfrzWUC/6tWKk4tykwtVrJSqFYqSi3LLM7MzwNyDHUUlJIzE vPSU3UzU4B8JSMDIxMDI0MT3ZTcxGRd0zQTi7QU8zTjJMsUJaDSgqLUtMwKsDHRsbW1AFX/e49 WAAAA To: Vinod Koul , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , Nicolas Ferre , "Alexandre Belloni" , Claudiu Beznea , Ludovic Desroches , Tudor Ambarus CC: , , , , "Durai Manickam KR" X-Mailer: b4 0.12.4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240215_024628_033860_4B071738 X-CRM114-Status: GOOD ( 16.66 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Added a description, required properties and appropriate compatibles for all the SoCs that are supported by microchip. Signed-off-by: Durai Manickam KR --- .../devicetree/bindings/dma/atmel-dma.txt | 42 ------------- .../bindings/dma/microchip,at91-dma.yaml | 71 ++++++++++++++++++++++ 2 files changed, 71 insertions(+), 42 deletions(-) --- base-commit: 7e90b5c295ec1e47c8ad865429f046970c549a66 change-id: 20240214-dmac-5f48fd7f3b9d Best regards, diff --git a/Documentation/devicetree/bindings/dma/atmel-dma.txt b/Documentation/devicetree/bindings/dma/atmel-dma.txt deleted file mode 100644 index f69bcf5a6343..000000000000 --- a/Documentation/devicetree/bindings/dma/atmel-dma.txt +++ /dev/null @@ -1,42 +0,0 @@ -* Atmel Direct Memory Access Controller (DMA) - -Required properties: -- compatible: Should be "atmel,-dma". -- reg: Should contain DMA registers location and length. -- interrupts: Should contain DMA interrupt. -- #dma-cells: Must be <2>, used to represent the number of integer cells in -the dmas property of client devices. - -Example: - -dma0: dma@ffffec00 { - compatible = "atmel,at91sam9g45-dma"; - reg = <0xffffec00 0x200>; - interrupts = <21>; - #dma-cells = <2>; -}; - -DMA clients connected to the Atmel DMA controller must use the format -described in the dma.txt file, using a three-cell specifier for each channel: -a phandle plus two integer cells. -The three cells in order are: - -1. A phandle pointing to the DMA controller. -2. The memory interface (16 most significant bits), the peripheral interface -(16 less significant bits). -3. Parameters for the at91 DMA configuration register which are device -dependent: - - bit 7-0: peripheral identifier for the hardware handshaking interface. The - identifier can be different for tx and rx. - - bit 11-8: FIFO configuration. 0 for half FIFO, 1 for ALAP, 2 for ASAP. - -Example: - -i2c0@i2c@f8010000 { - compatible = "atmel,at91sam9x5-i2c"; - reg = <0xf8010000 0x100>; - interrupts = <9 4 6>; - dmas = <&dma0 1 7>, - <&dma0 1 8>; - dma-names = "tx", "rx"; -}; diff --git a/Documentation/devicetree/bindings/dma/microchip,at91-dma.yaml b/Documentation/devicetree/bindings/dma/microchip,at91-dma.yaml new file mode 100644 index 000000000000..a0a582902e4d --- /dev/null +++ b/Documentation/devicetree/bindings/dma/microchip,at91-dma.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/microchip,at91-dma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Atmel Direct Memory Access Controller (DMA) + +maintainers: + - Ludovic Desroches + - Tudor Ambarus + +description: | + The Atmel Direct Memory Access Controller (DMAC) transfers data from a source + peripheral to a destination peripheral over one or more AMBA buses. One channel + is required for each source/destination pair. In the most basic configuration, + the DMAC has one master interface and one channel. The master interface reads + the data from a source and writes it to a destination. Two AMBA transfers are + required for each DMAC data transfer. This is also known as a dual-access transfer. + The DMAC is programmed via the APB interface. + +properties: + compatible: + oneOf: + - enum: + - atmel,at91sam9g45-dma + - atmel,at91sam9rl-dma + reg: + description: Should contain DMA registers location and length. + maxItems: 1 + + interrupts: + description: Should contain the DMA interrupts associated to the DMA channels. + maxItems: 1 + + "#dma-cells": + description: + Must be <2>, used to represent the number of integer cells in the dmas + property of client devices. + const: 2 + + clocks: + description: Should contain a clock specifier for each entry in clock-names. + maxItems: 1 + + clock-names: + description: Should contain the clock of the DMA controller. + const: dma_clk + +required: + - compatible + - reg + - interrupts + - "#dma-cells" + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + dma0: dma-controller@ffffec00 { + compatible = "atmel,at91sam9g45-dma"; + reg = <0xffffec00 0x200>; + interrupts = <21>; + #dma-cells = <2>; + clocks = <&pmc 2 20>; + clock-names = "dma_clk"; + }; + +...