From patchwork Fri Feb 16 06:24:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Devarsh Thakkar X-Patchwork-Id: 13559583 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 357F1C48BC4 for ; Fri, 16 Feb 2024 06:25:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=QqLnC5NExBUlZoQ69gIwKaYiql7Bj/gQjNOq8fXa5xg=; b=RAPD8v/x9RZaXw GylKHxbckKbvOsFBOZQ1rnuhDOL8Pk4enIg1qHqmcmjdW1tHf8J9Reb2AVP0xMdM5buebhW+7ZL87 gQ8OkiAnMAaeeVwqqG8h0P22Ao46IG78wLeslp/n70WAAzLDypWwQfGROl0FiJRUtNKfKeJOZuq+Y pOGq0rWkamjHpb/nwSs6y17PqLLQV5K4axykBiXvOl3F1kZ6ro//XJfgsa7tRdqjocd/mlxPNDW6D QpVWb5X07x7PCtKM3ZVf+db30fB8t+fS4hmt1GPcSrTZRUUVaMivkmSxjG9egad6U8S7Sof3kq8u6 qjQ8UEpP4fmsPazFjCqA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rareo-00000001DeA-3hJr; Fri, 16 Feb 2024 06:25:10 +0000 Received: from fllv0015.ext.ti.com ([198.47.19.141]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rarea-00000001DSJ-1AhG for linux-arm-kernel@lists.infradead.org; Fri, 16 Feb 2024 06:24:59 +0000 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 41G6OW4t111895; Fri, 16 Feb 2024 00:24:32 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1708064672; bh=TOOEaNpDntJQL+lxK7SQvuAf83A+vWd37eaG8FX3ejM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=lW2hyTBP9pLg4Xd8ruXXNOBUBgcsOAohuQWX8czACql4F+OazqhsKLteJ/67G/gbQ bJ4T1Ppbb5824/pX/HG9s2Ek6MF9cArcM4huLt0eo/uzAb2kGRfZ2Oezo4OGAIy5Ws C5rjrLZEAd31ADp1K0FmKsoAknEhLTwKGwNgR4T0= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 41G6OWB2108791 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 16 Feb 2024 00:24:32 -0600 Received: from DLEE110.ent.ti.com (157.170.170.21) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Fri, 16 Feb 2024 00:24:31 -0600 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Fri, 16 Feb 2024 00:24:32 -0600 Received: from localhost (ti.dhcp.ti.com [172.24.227.95] (may be forged)) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 41G6OV7l039873; Fri, 16 Feb 2024 00:24:31 -0600 From: Devarsh Thakkar To: , , , , , , , , , , , , , , , , CC: , , , Subject: [PATCH v5 3/4] arm64: dts: ti: Add common1 register space for AM62x SoC Date: Fri, 16 Feb 2024 11:54:25 +0530 Message-ID: <20240216062426.4170528-4-devarsht@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240216062426.4170528-1-devarsht@ti.com> References: <20240216062426.4170528-1-devarsht@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240215_222456_479252_0528E2FE X-CRM114-Status: GOOD ( 11.69 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This adds common1 register space for AM62x SoC which is using TI's Keystone display hardware and supporting it as described in Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml Fixes: 8ccc1073c7bb ("arm64: dts: ti: k3-am62-main: Add node for DSS") Signed-off-by: Devarsh Thakkar --- V1->V4 : - No change (this was part of "arm64: dts: ti: Add common1 register space for AM62x, AM62A & AM65x SoCs ) V5 : - Split this as a separate patch from "arm64: dts: ti: Add common1 register space for AM62x, AM62A & AM65x SoCs" - Remove Reviewed-By tag as patch is split now --- arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi index fe0cc4a9a501..8cee4d94cdd3 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi @@ -779,9 +779,10 @@ dss: dss@30200000 { <0x00 0x30207000 0x00 0x1000>, /* ovr1 */ <0x00 0x30208000 0x00 0x1000>, /* ovr2 */ <0x00 0x3020a000 0x00 0x1000>, /* vp1: Used for OLDI */ - <0x00 0x3020b000 0x00 0x1000>; /* vp2: Used as DPI Out */ + <0x00 0x3020b000 0x00 0x1000>, /* vp2: Used as DPI Out */ + <0x00 0x30201000 0x00 0x1000>; /* common1 */ reg-names = "common", "vidl1", "vid", - "ovr1", "ovr2", "vp1", "vp2"; + "ovr1", "ovr2", "vp1", "vp2", "common1"; power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 186 6>, <&dss_vp1_clk>,