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[35.195.168.105]) by smtp.gmail.com with ESMTPSA id az5-20020a05600c600500b0040e4733aecbsm2516628wmb.15.2024.02.16.06.04.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Feb 2024 06:04:58 -0800 (PST) From: Tudor Ambarus To: krzysztof.kozlowski+dt@linaro.org, robh@kernel.org, conor+dt@kernel.org Cc: alim.akhtar@samsung.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, broonie@kernel.org, andi.shyti@kernel.org, semen.protsenko@linaro.org, kernel-team@android.com, willmcvicker@google.com, andre.draszik@linaro.org, peter.griffin@linaro.org, Tudor Ambarus Subject: [PATCH v2 5/7] ARM: dts: samsung: exynos5433: specify the SPI FIFO depth Date: Fri, 16 Feb 2024 14:04:47 +0000 Message-ID: <20240216140449.2564625-6-tudor.ambarus@linaro.org> X-Mailer: git-send-email 2.44.0.rc0.258.g7320e95886-goog In-Reply-To: <20240216140449.2564625-1-tudor.ambarus@linaro.org> References: <20240216140449.2564625-1-tudor.ambarus@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240216_060501_763895_5191470C X-CRM114-Status: GOOD ( 10.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Up to now the SPI alias was used as an index into an array defined in the SPI driver to determine the SPI FIFO depthj Drop the dependency on the SPI alias and specify the SPI FIFO depth directly into the SPI node. The FIFO depth were determined based on the SPI aliases that are defined in exynos5433-tm2-common.dtsi: spi0 = &spi_0; spi1 = &spi_1; spi2 = &spi_2; spi3 = &spi_3; spi4 = &spi_4; spi-s3c64xx.c driver defines the following fifo_lvl_mask for the "samsung,exynos5433-spi" compatible: .fifo_lvl_mask = { 0x1ff, 0x7f, 0x7f, 0x7f, 0x7f, 0x1ff}, Thus spi{0, 4} were considered having 256 byte FIFO depths, and spi{1, 2, 3} having 64 byte FIFO depths. Update device tree with these FIFO depths. No functional change expected. Signed-off-by: Tudor Ambarus --- arch/arm64/boot/dts/exynos/exynos5433.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index 7fbbec04bff0..0b9053b9b2b5 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -1468,6 +1468,7 @@ spi_0: spi@14d20000 { pinctrl-names = "default"; pinctrl-0 = <&spi0_bus>; num-cs = <1>; + fifo-depth = <256>; status = "disabled"; }; @@ -1487,6 +1488,7 @@ spi_1: spi@14d30000 { pinctrl-names = "default"; pinctrl-0 = <&spi1_bus>; num-cs = <1>; + fifo-depth = <64>; status = "disabled"; }; @@ -1506,6 +1508,7 @@ spi_2: spi@14d40000 { pinctrl-names = "default"; pinctrl-0 = <&spi2_bus>; num-cs = <1>; + fifo-depth = <64>; status = "disabled"; }; @@ -1525,6 +1528,7 @@ spi_3: spi@14d50000 { pinctrl-names = "default"; pinctrl-0 = <&spi3_bus>; num-cs = <1>; + fifo-depth = <64>; status = "disabled"; }; @@ -1544,6 +1548,7 @@ spi_4: spi@14d00000 { pinctrl-names = "default"; pinctrl-0 = <&spi4_bus>; num-cs = <1>; + fifo-depth = <64>; status = "disabled"; };