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AJvYcCUSbVgAc7ekp31j+5354/TXTdhFQLzL11n9kRV4Pzin3w2XtnXPWNzuPRpLYp5RmKNXaBDkfgqVOkGH3xlOh1rOlcIBRPG4dZhCUF2R9ZUtqQaaPFQ= X-Gm-Message-State: AOJu0YyExx+wVcmk5Zl54av3eCA6j1VqofMj6Bh6+zFHyY2cRlOG5smo 6mJCwOoLW5lTpC9QHn6b4EUhcuj1VtwYFvGVlW8cfKQ/zcLKj7+2 X-Google-Smtp-Source: AGHT+IHxkZX3auLTPAfGj/5QgChR12wrYdWdu9SKHx0EmevS1A3wDKwZARalLbPB/ZrSULuvY5aXew== X-Received: by 2002:a2e:b169:0:b0:2d2:643b:df06 with SMTP id a9-20020a2eb169000000b002d2643bdf06mr1365251ljm.2.1708625668311; Thu, 22 Feb 2024 10:14:28 -0800 (PST) Received: from localhost ([178.176.56.174]) by smtp.gmail.com with ESMTPSA id j26-20020a2e801a000000b002d10d093c4csm2381337ljg.111.2024.02.22.10.14.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Feb 2024 10:14:27 -0800 (PST) From: Serge Semin To: Michal Simek , Alexander Stein , Borislav Petkov , Tony Luck , James Morse , Mauro Carvalho Chehab , Robert Richter , Manish Narani Cc: Serge Semin , Punnaiah Choudary Kalluri , Dinh Nguyen , Arnd Bergmann , Greg Kroah-Hartman , linux-arm-kernel@lists.infradead.org, linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org, Borislav Petkov Subject: [PATCH v5 04/20] EDAC/synopsys: Drop erroneous ADDRMAP4.addrmap_col_b10 parse Date: Thu, 22 Feb 2024 21:12:49 +0300 Message-ID: <20240222181324.28242-5-fancer.lancer@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240222181324.28242-1-fancer.lancer@gmail.com> References: <20240222181324.28242-1-fancer.lancer@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240222_101441_586238_D1AF7C66 X-CRM114-Status: GOOD ( 13.28 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Currently the ADDRMAP4.addrmap_col_b10 field gets to be parsed in case of the LPDDR3 memory and Quarter DQ bus width mode. It's wrong since that field is marked as unused for that mode in all the available DW uMCTL2 DDRC releases (up to IP-core v3.91a). Most likely the field parsing was added by mistake as a result of the copy-paste from the Half DQ bus width mode part of the same function. Even though the field is supposed to be always set to the UNUSED value (0x1F) drop parsing it anyway so to simplify the setup_column_address_map() method a tiny bit. Fixes: 1a81361f75d8 ("EDAC, synopsys: Add Error Injection support for ZynqMP DDR controller") Signed-off-by: Serge Semin --- drivers/edac/synopsys_edac.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c index 7c57c43b4d31..bd6e52db68bc 100644 --- a/drivers/edac/synopsys_edac.c +++ b/drivers/edac/synopsys_edac.c @@ -1236,10 +1236,6 @@ static void setup_column_address_map(struct synps_edac_priv *priv, u32 *addrmap) COL_MAX_VAL_MASK) == COL_MAX_VAL_MASK) ? 0 : (((addrmap[3] >> 24) & COL_MAX_VAL_MASK) + COL_B9_BASE); - priv->col_shift[13] = ((addrmap[4] & - COL_MAX_VAL_MASK) == COL_MAX_VAL_MASK) ? 0 : - ((addrmap[4] & COL_MAX_VAL_MASK) + - COL_B10_BASE); } else { priv->col_shift[11] = (((addrmap[3] >> 16) & COL_MAX_VAL_MASK) == COL_MAX_VAL_MASK) ? 0 :