diff mbox series

[v3,3/4] arm64: dts: imx8mp-phyboard-pollux: Reduce drive strength for eqos tx lines

Message ID 20240223172211.6592-4-y.varakala@phytec.de (mailing list archive)
State New, archived
Headers show
Series Update of phyBOARD-Pollux-i.MX8MP | expand

Commit Message

Yashwanth Varakala Feb. 23, 2024, 5:22 p.m. UTC
From: Teresa Remmet <t.remmet@phytec.de>

Reduce drive strength on eqos tx lines for signal quality improvements.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de>
Signed-off-by: Yashwanth Varakala <y.varakala@phytec.de>
---
Changes in v2:
-Corrected the Authorship.

 .../dts/freescale/imx8mp-phyboard-pollux-rdk.dts     | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
index f95af797531a..e85176d23376 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
@@ -310,12 +310,12 @@  MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2		0x90
 			MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3		0x90
 			MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK	0x90
 			MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL		0x90
-			MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0		0x16
-			MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1		0x16
-			MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2		0x16
-			MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3		0x16
-			MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL		0x16
-			MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK	0x16
+			MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0		0x12
+			MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1		0x12
+			MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2		0x12
+			MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3		0x12
+			MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL		0x12
+			MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK	0x12
 			MX8MP_IOMUXC_SAI1_MCLK__GPIO4_IO20			0x10
 		>;
 	};