From patchwork Tue Mar 5 11:40:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Diogo Ivo X-Patchwork-Id: 13582250 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7FD64C54798 for ; Tue, 5 Mar 2024 11:41:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=CorrygdZhH5hz8a8uXViiCTB201GiKyZQaSxpHBdFrw=; b=mINAd5MKFfUyxi TReqDjVtADSpFP7QpzS6m0hDn46YPuH2b+2zuIPhKcUG7BGB6iEcQn6hvSGhoKAEksiAhtC45ZZpE D/vodI1v3tPn6sIefLQ1v1f6RJRDanJrWLPtyNJHzLDfWkzxVF1NHIQEy1QF/o25EbjNvT3C5PC5I 6H6PCygo+G4YBOQbGZoz9eG9YuJ7BywZLgMMoEFBmcSkA9fDwX+ClvZpzt5tFL7uY/UQHyjuDiBsX BfcVdoRb32SI/xJSk6G2JptRtUu3XBjcDWdcRzfbBhYuCaIdgPVXsXCdK5A5fPLhU1TyNoqGTwNcV 1BjRO+Cp7YZqWjVhoi2A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rhTAu-0000000DPtf-2zpY; Tue, 05 Mar 2024 11:41:36 +0000 Received: from mta-65-227.siemens.flowmailer.net ([185.136.65.227]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rhTAb-0000000DPZc-4BbW for linux-arm-kernel@lists.infradead.org; Tue, 05 Mar 2024 11:41:25 +0000 Received: by mta-65-227.siemens.flowmailer.net with ESMTPSA id 20240305114056c9d80dc8567f88990c for ; Tue, 05 Mar 2024 12:40:56 +0100 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; s=fm1; d=siemens.com; i=diogo.ivo@siemens.com; h=Date:From:Subject:To:Message-ID:MIME-Version:Content-Type:Content-Transfer-Encoding:Cc:References:In-Reply-To; bh=s8rrvI6waU1Tgjb2+GhfN3vx2WZQaQ/whDjR4cpwRzs=; b=e8GAVCdw/ITDBykw0QYwvRmVzwdb7WNZhLYSk2vPkRJ2tGmsUh1ShMxKLH2Ye4f+c+r+4y cD8trsripXuBDSUn6J21Z1nsnL07D5un9VNyXlcIHqnQh8nKuKWwkxfp2nh7KUOyfEfi/q2e UM5iCn2t/o/nA1k5hpClQxQJp2XbM=; From: Diogo Ivo To: danishanwar@ti.com, rogerq@kernel.org, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, linux-arm-kernel@lists.infradead.org, netdev@vger.kernel.org, devicetree@vger.kernel.org Cc: Diogo Ivo , jan.kiszka@siemens.com, Conor Dooley Subject: [PATCH net-next v4 01/10] dt-bindings: net: Add support for AM65x SR1.0 in ICSSG Date: Tue, 5 Mar 2024 11:40:21 +0000 Message-ID: <20240305114045.388893-2-diogo.ivo@siemens.com> In-Reply-To: <20240305114045.388893-1-diogo.ivo@siemens.com> References: <20240305114045.388893-1-diogo.ivo@siemens.com> MIME-Version: 1.0 X-Flowmailer-Platform: Siemens Feedback-ID: 519:519-1320519:519-21489:flowmailer X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240305_034124_049541_C96C5B1C X-CRM114-Status: UNSURE ( 9.52 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Silicon Revision 1.0 of the AM65x came with a slightly different ICSSG support: Only 2 PRUs per slice are available and instead 2 additional DMA channels are used for management purposes. We have no restrictions on specified PRUs, but the DMA channels need to be adjusted. Co-developed-by: Jan Kiszka Signed-off-by: Jan Kiszka Signed-off-by: Diogo Ivo Reviewed-by: Conor Dooley Reviewed-by: Roger Quadros --- Changes in v4: - Added Reviewed-by tags from Roger and Conor Changes in v3: - Fixed dt_binding_check error by moving allOf Changes in v2: - Removed explicit reference to SR2.0 - Moved sr1 to the SoC name - Expand dma-names list and adjust min/maxItems depending on SR1.0/2.0 .../bindings/net/ti,icssg-prueth.yaml | 35 +++++++++++++++---- 1 file changed, 29 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml b/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml index 229c8f32019f..e253fa786092 100644 --- a/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml +++ b/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml @@ -13,14 +13,12 @@ description: Ethernet based on the Programmable Real-Time Unit and Industrial Communication Subsystem. -allOf: - - $ref: /schemas/remoteproc/ti,pru-consumer.yaml# - properties: compatible: enum: - - ti,am642-icssg-prueth # for AM64x SoC family - - ti,am654-icssg-prueth # for AM65x SoC family + - ti,am642-icssg-prueth # for AM64x SoC family + - ti,am654-icssg-prueth # for AM65x SoC family + - ti,am654-sr1-icssg-prueth # for AM65x SoC family, SR1.0 sram: $ref: /schemas/types.yaml#/definitions/phandle @@ -28,9 +26,11 @@ properties: phandle to MSMC SRAM node dmas: - maxItems: 10 + minItems: 10 + maxItems: 12 dma-names: + minItems: 10 items: - const: tx0-0 - const: tx0-1 @@ -42,6 +42,8 @@ properties: - const: tx1-3 - const: rx0 - const: rx1 + - const: rxmgm0 + - const: rxmgm1 ti,mii-g-rt: $ref: /schemas/types.yaml#/definitions/phandle @@ -132,6 +134,27 @@ required: - interrupts - interrupt-names +allOf: + - $ref: /schemas/remoteproc/ti,pru-consumer.yaml# + + - if: + properties: + compatible: + contains: + const: ti,am654-sr1-icssg-prueth + then: + properties: + dmas: + minItems: 12 + dma-names: + minItems: 12 + else: + properties: + dmas: + maxItems: 10 + dma-names: + maxItems: 10 + unevaluatedProperties: false examples: