@@ -51,6 +51,7 @@
#define NUM_COUNTERS 11
#define CYCLES_COUNTER 0
+#define CYCLES_EVENT_ID 0
#define CONFIG_EVENT_MASK 0x00FF
#define CONFIG_EVENT_OFFSET 0
@@ -271,6 +272,16 @@ static struct attribute *ddr_perf_events_attrs[] = {
NULL,
};
+/*
+ * An event is either reference evnet or counter specific event.
+ * For counter specific event, the event count will only be incremented
+ * on the corresponding counter.
+ */
+static bool ddr_perf_is_counter_specific_event(int event)
+{
+ return event >= 64 && event <= 73;
+}
+
static umode_t
ddr_perf_events_attrs_is_visible(struct kobject *kobj,
struct attribute *attr, int unused)
@@ -529,6 +540,7 @@ static int ddr_perf_event_init(struct perf_event *event)
struct ddr_pmu *pmu = to_ddr_pmu(event->pmu);
struct hw_perf_event *hwc = &event->hw;
struct perf_event *sibling;
+ int event_id, counter;
if (event->attr.type != event->pmu->type)
return -ENOENT;
@@ -541,6 +553,18 @@ static int ddr_perf_event_init(struct perf_event *event)
return -EOPNOTSUPP;
}
+ counter = (event->attr.config & CONFIG_COUNTER_MASK) >> CONFIG_COUNTER_OFFSET;
+ if (counter > NUM_COUNTERS) {
+ dev_warn(pmu->dev, "Only counter 0-10 is supported!\n");
+ return -EINVAL;
+ }
+
+ event_id = (event->attr.config & CONFIG_EVENT_MASK) >> CONFIG_EVENT_OFFSET;
+ if (ddr_perf_is_counter_specific_event(event_id) && counter == 0) {
+ dev_err(pmu->dev, "Need specify counter for counter specific events!\n");
+ return -EINVAL;
+ }
+
/*
* We must NOT create groups containing mixed PMUs, although software
* events are acceptable (for example to create a CCN group
@@ -574,6 +598,39 @@ static void ddr_perf_event_start(struct perf_event *event, int flags)
hwc->state = 0;
}
+static int ddr_perf_alloc_counter(struct ddr_pmu *pmu, int event, int counter)
+{
+ int i;
+
+ if (event == CYCLES_EVENT_ID) {
+ /*
+ * Always map cycle event to counter 0.
+ * Cycles counter is dedicated for cycle event
+ * can't used for the other counters.
+ */
+ if (pmu->events[CYCLES_COUNTER] == NULL)
+ return CYCLES_COUNTER;
+ } else if (counter != 0) {
+ /*
+ * 1. ddr_perf_event_init() will make sure counter
+ * is not 0 for counter specific events.
+ * 2. Allow specify counter for referene event too.
+ */
+ if (pmu->events[counter] == NULL)
+ return counter;
+ } else {
+ /*
+ * Counter may be 0 if user doesn't specify it.
+ * Auto allocate counter for referene event.
+ */
+ for (i = 1; i < NUM_COUNTERS; i++)
+ if (pmu->events[i] == NULL)
+ return i;
+ }
+
+ return -ENOENT;
+}
+
static int ddr_perf_event_add(struct perf_event *event, int flags)
{
struct ddr_pmu *pmu = to_ddr_pmu(event->pmu);
@@ -581,10 +638,18 @@ static int ddr_perf_event_add(struct perf_event *event, int flags)
int cfg = event->attr.config;
int cfg1 = event->attr.config1;
int cfg2 = event->attr.config2;
- int counter;
+ int event_id, counter;
+ event_id = (cfg & CONFIG_EVENT_MASK) >> CONFIG_EVENT_OFFSET;
counter = (cfg & CONFIG_COUNTER_MASK) >> CONFIG_COUNTER_OFFSET;
+ /* check if counter is available or needs to allocate one */
+ counter = ddr_perf_alloc_counter(pmu, event_id, counter);
+ if (counter < 0) {
+ dev_dbg(pmu->dev, "There are not enough counters\n");
+ return -EOPNOTSUPP;
+ }
+
pmu->events[counter] = event;
pmu->active_events++;
hwc->idx = counter;
@@ -620,9 +685,11 @@ static void ddr_perf_event_del(struct perf_event *event, int flags)
{
struct ddr_pmu *pmu = to_ddr_pmu(event->pmu);
struct hw_perf_event *hwc = &event->hw;
+ int counter = hwc->idx;
ddr_perf_event_stop(event, PERF_EF_UPDATE);
+ pmu->events[counter] = NULL;
pmu->active_events--;
hwc->idx = -1;
}
The user can pass any counter ID to perf app. However, current pmu driver doesn't judge the validity of the counter ID. This will add necessary check for counter ID from user space. Besides, this pmu has 10 counters except cycle counter which can be used to count reference events and counter specific evnets. This will also add supports to auto allocate counter if the user doesn't pass it the perf. Then, the usage of counter will be optimized. Signed-off-by: Xu Yang <xu.yang_2@nxp.com> --- Changes in v2: - limit counter ID from user to 0-10 - combine dynamic and static allocation of counter Changes in v3: - no changes Changes in v4: - rename ddr_perf_is_specific_event() - use macro definitions to parse config attr Changes in v5: - improve ddr_perf_is_counter_specific_event() --- drivers/perf/fsl_imx9_ddr_perf.c | 69 +++++++++++++++++++++++++++++++- 1 file changed, 68 insertions(+), 1 deletion(-)