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[2/2] ARM: dts: samsung: s5pv210: correct onenand size-cells

Message ID 20240313191148.21792-2-krzysztof.kozlowski@linaro.org (mailing list archive)
State New, archived
Headers show
Series [1/2] ARM: dts: samsung: s5pv210: align onenand node name with bindings | expand

Commit Message

Krzysztof Kozlowski March 13, 2024, 7:11 p.m. UTC 
Children of NAND controllers have only chip select, so address without
the size.  Correct size-cells as reported by dtbs_check:

  s5pv210-galaxys.dtb: onenand@b0600000: #size-cells:0:0: 0 was expected

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 arch/arm/boot/dts/samsung/s5pv210.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/samsung/s5pv210.dtsi b/arch/arm/boot/dts/samsung/s5pv210.dtsi
index 23459430410f..9720573d84dc 100644
--- a/arch/arm/boot/dts/samsung/s5pv210.dtsi
+++ b/arch/arm/boot/dts/samsung/s5pv210.dtsi
@@ -82,7 +82,7 @@  onenand: nand-controller@b0600000 {
 			clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>;
 			clock-names = "bus", "onenand";
 			#address-cells = <1>;
-			#size-cells = <1>;
+			#size-cells = <0>;
 			status = "disabled";
 		};