diff mbox series

[v7,5/8] perf: imx_perf: fix counter start and config sequence

Message ID 20240315095555.2628684-5-xu.yang_2@nxp.com (mailing list archive)
State New, archived
Headers show
Series [v7,1/8] dt-bindings: perf: fsl-imx-ddr: Add i.MX95 compatible | expand

Commit Message

Xu Yang March 15, 2024, 9:55 a.m. UTC
In current driver, the counter will start firstly and then be configured.
This sequence is not correct for AXI filter events since the correct
AXI_MASK and AXI_ID are not set yet. Then the results may be inaccurate.

Signed-off-by: Xu Yang <xu.yang_2@nxp.com>

---
Changes in v5:
 - new patch
Changes in v6:
 - no changes
Changes in v7:
 - no changes
---
 drivers/perf/fsl_imx9_ddr_perf.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

Comments

Frank Li March 18, 2024, 6:33 p.m. UTC | #1
On Fri, Mar 15, 2024 at 05:55:52PM +0800, Xu Yang wrote:
> In current driver, the counter will start firstly and then be configured.
> This sequence is not correct for AXI filter events since the correct
> AXI_MASK and AXI_ID are not set yet. Then the results may be inaccurate.
> 
> Signed-off-by: Xu Yang <xu.yang_2@nxp.com>

This one should be bug fix. Can you add fixes tag?

> 
> ---
> Changes in v5:
>  - new patch
> Changes in v6:
>  - no changes
> Changes in v7:
>  - no changes
> ---
>  drivers/perf/fsl_imx9_ddr_perf.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/perf/fsl_imx9_ddr_perf.c b/drivers/perf/fsl_imx9_ddr_perf.c
> index 5537f4e07852..c99c43b214cb 100644
> --- a/drivers/perf/fsl_imx9_ddr_perf.c
> +++ b/drivers/perf/fsl_imx9_ddr_perf.c
> @@ -523,12 +523,12 @@ static int ddr_perf_event_add(struct perf_event *event, int flags)
>  	hwc->idx = counter;
>  	hwc->state |= PERF_HES_STOPPED;
>  
> -	if (flags & PERF_EF_START)
> -		ddr_perf_event_start(event, flags);
> -
>  	/* read trans, write trans, read beat */
>  	imx93_ddr_perf_monitor_config(pmu, event_id, counter, cfg1, cfg2);
>  
> +	if (flags & PERF_EF_START)
> +		ddr_perf_event_start(event, flags);
> +
>  	return 0;
>  }
>  
> -- 
> 2.34.1
>
Xu Yang March 22, 2024, 6:31 a.m. UTC | #2
> 
> On Fri, Mar 15, 2024 at 05:55:52PM +0800, Xu Yang wrote:
> > In current driver, the counter will start firstly and then be configured.
> > This sequence is not correct for AXI filter events since the correct
> > AXI_MASK and AXI_ID are not set yet. Then the results may be inaccurate.
> >
> > Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
> 
> This one should be bug fix. Can you add fixes tag?

Sure.

Thanks,
Xu Yang

> 
> >
> > ---
> > Changes in v5:
> >  - new patch
> > Changes in v6:
> >  - no changes
> > Changes in v7:
> >  - no changes
> > ---
> >  drivers/perf/fsl_imx9_ddr_perf.c | 6 +++---
> >  1 file changed, 3 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/perf/fsl_imx9_ddr_perf.c b/drivers/perf/fsl_imx9_ddr_perf.c
> > index 5537f4e07852..c99c43b214cb 100644
> > --- a/drivers/perf/fsl_imx9_ddr_perf.c
> > +++ b/drivers/perf/fsl_imx9_ddr_perf.c
> > @@ -523,12 +523,12 @@ static int ddr_perf_event_add(struct perf_event *event, int flags)
> >  	hwc->idx = counter;
> >  	hwc->state |= PERF_HES_STOPPED;
> >
> > -	if (flags & PERF_EF_START)
> > -		ddr_perf_event_start(event, flags);
> > -
> >  	/* read trans, write trans, read beat */
> >  	imx93_ddr_perf_monitor_config(pmu, event_id, counter, cfg1, cfg2);
> >
> > +	if (flags & PERF_EF_START)
> > +		ddr_perf_event_start(event, flags);
> > +
> >  	return 0;
> >  }
> >
> > --
> > 2.34.1
> >
diff mbox series

Patch

diff --git a/drivers/perf/fsl_imx9_ddr_perf.c b/drivers/perf/fsl_imx9_ddr_perf.c
index 5537f4e07852..c99c43b214cb 100644
--- a/drivers/perf/fsl_imx9_ddr_perf.c
+++ b/drivers/perf/fsl_imx9_ddr_perf.c
@@ -523,12 +523,12 @@  static int ddr_perf_event_add(struct perf_event *event, int flags)
 	hwc->idx = counter;
 	hwc->state |= PERF_HES_STOPPED;
 
-	if (flags & PERF_EF_START)
-		ddr_perf_event_start(event, flags);
-
 	/* read trans, write trans, read beat */
 	imx93_ddr_perf_monitor_config(pmu, event_id, counter, cfg1, cfg2);
 
+	if (flags & PERF_EF_START)
+		ddr_perf_event_start(event, flags);
+
 	return 0;
 }