From patchwork Fri Mar 15 23:09:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Anderson X-Patchwork-Id: 13594128 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A440BC54E67 for ; Fri, 15 Mar 2024 23:10:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=PcXmLTKWbaqAk8HchckLhka9uweb+pugPKUax+LkvFY=; b=YoO4Faoktku6Hc uIQ4xByLpxpoug6n2lovBnz8fjRnEm9yIkuUkZAbkoJLo3G9fK/+mUPBu7iJ9BrU3WDuBeub/hYL4 Vnl00yRbMGeOGbw16bCSxez0U4V218Fnx+sxYMSUewlKAGGIGk4kH8eeLq2CZLQRCG+rscjHExSzj g8bj05P/PvF3TvCXrka6VY1ghht4QBaFPnpHO2rBjjEh0EH48Uh8m8PvPwmtn962NlIQ4DZhL6u+7 Nuw5MXeHO1XMgNkpXe9IAabz8paVatCHOqzf9tZO+5i4cG70pDZnNuOljVrwd7e+mlT+uIJMOxP0W rWvXcdbupgxa7P0UGsGg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rlGgO-00000001pGS-1Uiy; Fri, 15 Mar 2024 23:09:48 +0000 Received: from out-174.mta1.migadu.com ([95.215.58.174]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rlGg6-00000001p4M-0uXr for linux-arm-kernel@lists.infradead.org; Fri, 15 Mar 2024 23:09:37 +0000 X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1710544167; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=R2Qeb73E854SLNNqpfgzZuZinTfxWG3SchDvt92uTCI=; b=KsbOkTNZiQeegFXVQDpqlUx8jkW8Z7Ir6x2ewKOI/CqJl/7WHHXmvqtOD63M5XhdZ1wOIl DZgfnKLuJS9QqhFmPbDKc6x874/8ClrrkRYiYl3uor0Hsyq+9vuNWNA8mq/V+LNmLZUgdh yPixMKOSoUVqdH8WGoTZ/mY3F1Gx1MQ= From: Sean Anderson To: Laurent Pinchart , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , dri-devel@lists.freedesktop.org Cc: David Airlie , linux-kernel@vger.kernel.org, Michal Simek , linux-arm-kernel@lists.infradead.org, Daniel Vetter , Sean Anderson Subject: [PATCH 2/6] drm: zynqmp_dp: Adjust training values per-lane Date: Fri, 15 Mar 2024 19:09:12 -0400 Message-Id: <20240315230916.1759060-3-sean.anderson@linux.dev> In-Reply-To: <20240315230916.1759060-1-sean.anderson@linux.dev> References: <20240315230916.1759060-1-sean.anderson@linux.dev> MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240315_160930_417724_19EBF833 X-CRM114-Status: UNSURE ( 9.38 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The feedback we get from the DPRX is per-lane. Make changes using this information, instead of picking the maximum values from all lanes. This results in more-consistent training on marginal links. Signed-off-by: Sean Anderson --- drivers/gpu/drm/xlnx/zynqmp_dp.c | 23 ++++++++--------------- 1 file changed, 8 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c b/drivers/gpu/drm/xlnx/zynqmp_dp.c index 98a32e6a0459..8635b5673386 100644 --- a/drivers/gpu/drm/xlnx/zynqmp_dp.c +++ b/drivers/gpu/drm/xlnx/zynqmp_dp.c @@ -605,28 +605,21 @@ static void zynqmp_dp_adjust_train(struct zynqmp_dp *dp, u8 link_status[DP_LINK_STATUS_SIZE]) { u8 *train_set = dp->train_set; - u8 voltage = 0, preemphasis = 0; u8 i; for (i = 0; i < dp->mode.lane_cnt; i++) { - u8 v = drm_dp_get_adjust_request_voltage(link_status, i); - u8 p = drm_dp_get_adjust_request_pre_emphasis(link_status, i); + u8 voltage = drm_dp_get_adjust_request_voltage(link_status, i); + u8 preemphasis = + drm_dp_get_adjust_request_pre_emphasis(link_status, i); - if (v > voltage) - voltage = v; + if (voltage >= DP_TRAIN_VOLTAGE_SWING_LEVEL_3) + voltage |= DP_TRAIN_MAX_SWING_REACHED; - if (p > preemphasis) - preemphasis = p; - } + if (preemphasis >= DP_TRAIN_PRE_EMPH_LEVEL_2) + preemphasis |= DP_TRAIN_MAX_PRE_EMPHASIS_REACHED; - if (voltage >= DP_TRAIN_VOLTAGE_SWING_LEVEL_3) - voltage |= DP_TRAIN_MAX_SWING_REACHED; - - if (preemphasis >= DP_TRAIN_PRE_EMPH_LEVEL_2) - preemphasis |= DP_TRAIN_MAX_PRE_EMPHASIS_REACHED; - - for (i = 0; i < dp->mode.lane_cnt; i++) train_set[i] = voltage | preemphasis; + } } /**