From patchwork Tue Mar 19 22:51:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Anderson X-Patchwork-Id: 13597108 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5D46BC54E71 for ; Tue, 19 Mar 2024 22:52:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=fakOK2gLXHgLj4L0OndPEw2Go0XeAKI2JseJASF5d7U=; b=EbHjWAYHDihb8R O0MA34iLzPuBrF0lHjlDvXbUdZukJqQQUwH0gbFJPQPZzm7+RgevBMkS1duVqA6uGaeTmCZpNvW9d Sh1UPc/eEaMB5Taz30mWxnlDUItUS6r37xN2AXRePYaw0S9H6QuqBlVsr5HcKZzHTAYkhFtjGOrZO NWKdhyG5rLGjMH9APKHkNfrKrVu1hLhTZho7DAwkuGJ8lze8DdoMm1ntX+A83BAcRxcpCmdcWg7/T uKuBpC+aF/dl2wn9XtDc3soQ4RaWwPx0ICEYSZE1xktQ0NpqXnWJdTHVF1hIgbxyzF4Qvh8W7vT/e A/w0BY5RJXknv0Ue2s5w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rmiJO-0000000EVac-2rPt; Tue, 19 Mar 2024 22:52:02 +0000 Received: from out-183.mta0.migadu.com ([2001:41d0:1004:224b::b7]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rmiJ8-0000000EVOT-0KOy for linux-arm-kernel@lists.infradead.org; Tue, 19 Mar 2024 22:51:48 +0000 X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1710888704; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=22MOrFn6Jv82M2hVwDO7x3NptrRxbkjYXXxqCJWSeQI=; b=seV259zXIx8RJKOwI0MDotOAEjzP+juNH/bWlbGRbh6ap4CtCnQrsUaDJ0ZK1LsqzBNAjV 6R1oP+eSNpNZLP01oqbjLCeskK14c85TKt04yQs3Ty35D1obgsbYQjK5Kf7tzGpZDZXMIB NJlDPtthqS4EwUN/yPCjp9AFNyIC8WU= From: Sean Anderson To: Laurent Pinchart , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , dri-devel@lists.freedesktop.org Cc: Michal Simek , David Airlie , linux-kernel@vger.kernel.org, Daniel Vetter , linux-arm-kernel@lists.infradead.org, Sean Anderson Subject: [PATCH v2 4/8] drm: zynqmp_dp: Rearrange zynqmp_dp for better padding Date: Tue, 19 Mar 2024 18:51:17 -0400 Message-Id: <20240319225122.3048400-5-sean.anderson@linux.dev> In-Reply-To: <20240319225122.3048400-1-sean.anderson@linux.dev> References: <20240319225122.3048400-1-sean.anderson@linux.dev> MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240319_155147_583487_A1FD4D8B X-CRM114-Status: UNSURE ( 9.22 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Sort the members of struct zynqmp_dp to reduce padding necessary for alignment. Signed-off-by: Sean Anderson --- Changes in v2: - New drivers/gpu/drm/xlnx/zynqmp_dp.c | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c b/drivers/gpu/drm/xlnx/zynqmp_dp.c index 8635b5673386..f1834c8e3c02 100644 --- a/drivers/gpu/drm/xlnx/zynqmp_dp.c +++ b/drivers/gpu/drm/xlnx/zynqmp_dp.c @@ -255,10 +255,10 @@ struct zynqmp_dp_link_config { * @fmt: format identifier string */ struct zynqmp_dp_mode { - u8 bw_code; - u8 lane_cnt; - int pclock; const char *fmt; + int pclock; + u8 bw_code; + u8 lane_cnt; }; /** @@ -295,27 +295,27 @@ struct zynqmp_dp_config { * @train_set: set of training data */ struct zynqmp_dp { + struct drm_dp_aux aux; + struct drm_bridge bridge; + struct delayed_work hpd_work; + + struct drm_bridge *next_bridge; struct device *dev; struct zynqmp_dpsub *dpsub; void __iomem *iomem; struct reset_control *reset; - int irq; - - struct drm_bridge bridge; - struct drm_bridge *next_bridge; - - struct zynqmp_dp_config config; - struct drm_dp_aux aux; struct phy *phy[ZYNQMP_DP_MAX_LANES]; - u8 num_lanes; - struct delayed_work hpd_work; + enum drm_connector_status status; + int irq; bool enabled; - u8 dpcd[DP_RECEIVER_CAP_SIZE]; - struct zynqmp_dp_link_config link_config; struct zynqmp_dp_mode mode; + struct zynqmp_dp_link_config link_config; + struct zynqmp_dp_config config; + u8 dpcd[DP_RECEIVER_CAP_SIZE]; u8 train_set[ZYNQMP_DP_MAX_LANES]; + u8 num_lanes; }; static inline struct zynqmp_dp *bridge_to_dp(struct drm_bridge *bridge)