| Message ID | 20240321081439.541799-2-xu.yang_2@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v10,01/11] dt-bindings: usb: usbmisc-imx: add fsl,imx8ulp-usbmisc compatible | expand |
On Thu, Mar 21, 2024 at 04:14:30PM +0800, Xu Yang wrote: > Add USB nodes on i.MX8ULP platform which has 2 USB controllers. > > Signed-off-by: Xu Yang <xu.yang_2@nxp.com> > > --- > Changes in v2: > - no changes > Changes in v3: > - no changes > Changes in v4: > - no changes > Changes in v5: > - no changes > Changes in v6: > - drop usbphy aliases > Changes in v7: > - no changes > Changes in v8: > - no changes > Changes in v9: > - no changes > Changes in v10: > - no changes > --- > arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 62 ++++++++++++++++++++++ > 1 file changed, 62 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi > index c4a0082f30d3..7da9461a5745 100644 > --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi > @@ -472,6 +472,68 @@ usdhc2: mmc@298f0000 { > status = "disabled"; > }; > > + usbotg1: usb@29900000 { > + compatible = "fsl,imx8ulp-usb", "fsl,imx7ulp-usb", "fsl,imx6ul-usb"; > + reg = <0x29900000 0x200>; > + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&pcc4 IMX8ULP_CLK_USB0>; > + power-domains = <&scmi_devpd IMX8ULP_PD_USB0>; > + phys = <&usbphy1>; > + fsl,usbmisc = <&usbmisc1 0>; > + ahb-burst-config = <0x0>; > + tx-burst-size-dword = <0x8>; > + rx-burst-size-dword = <0x8>; > + status = "disabled"; > + }; > + > + usbmisc1: usbmisc@29900200 { > + compatible = "fsl,imx8ulp-usbmisc", "fsl,imx7d-usbmisc", > + "fsl,imx6q-usbmisc"; > + #index-cells = <1>; > + reg = <0x29900200 0x200>; Could you move 'reg' above so that it's after compatible? > + status = "disabled"; > + }; > + > + usbphy1: usb-phy@29910000 { > + compatible = "fsl,imx8ulp-usbphy", "fsl,imx7ulp-usbphy"; > + reg = <0x29910000 0x10000>; > + interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&pcc4 IMX8ULP_CLK_USB0_PHY>; > + #phy-cells = <0>; > + status = "disabled"; > + }; > + > + usbotg2: usb@29920000 { > + compatible = "fsl,imx8ulp-usb", "fsl,imx7ulp-usb", "fsl,imx6ul-usb"; > + reg = <0x29920000 0x200>; > + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&pcc4 IMX8ULP_CLK_USB1>; > + power-domains = <&scmi_devpd IMX8ULP_PD_USDHC2_USB1>; > + phys = <&usbphy2>; > + fsl,usbmisc = <&usbmisc2 0>; > + ahb-burst-config = <0x0>; > + tx-burst-size-dword = <0x8>; > + rx-burst-size-dword = <0x8>; > + status = "disabled"; > + }; > + > + usbmisc2: usbmisc@29920200 { > + compatible = "fsl,imx8ulp-usbmisc", "fsl,imx7d-usbmisc", > + "fsl,imx6q-usbmisc"; > + #index-cells = <1>; > + reg = <0x29920200 0x200>; Ditto Shawn > + status = "disabled"; > + }; > + > + usbphy2: usb-phy@29930000 { > + compatible = "fsl,imx8ulp-usbphy", "fsl,imx7ulp-usbphy"; > + reg = <0x29930000 0x10000>; > + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&pcc4 IMX8ULP_CLK_USB1_PHY>; > + #phy-cells = <0>; > + status = "disabled"; > + }; > + > fec: ethernet@29950000 { > compatible = "fsl,imx8ulp-fec", "fsl,imx6ul-fec", "fsl,imx6q-fec"; > reg = <0x29950000 0x10000>; > -- > 2.34.1 >
> > On Thu, Mar 21, 2024 at 04:14:30PM +0800, Xu Yang wrote: > > Add USB nodes on i.MX8ULP platform which has 2 USB controllers. > > > > Signed-off-by: Xu Yang <xu.yang_2@nxp.com> > > > > --- > > Changes in v2: > > - no changes > > Changes in v3: > > - no changes > > Changes in v4: > > - no changes > > Changes in v5: > > - no changes > > Changes in v6: > > - drop usbphy aliases > > Changes in v7: > > - no changes > > Changes in v8: > > - no changes > > Changes in v9: > > - no changes > > Changes in v10: > > - no changes > > --- > > arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 62 ++++++++++++++++++++++ > > 1 file changed, 62 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi > > index c4a0082f30d3..7da9461a5745 100644 > > --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi > > +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi > > @@ -472,6 +472,68 @@ usdhc2: mmc@298f0000 { > > status = "disabled"; > > }; > > > > + usbotg1: usb@29900000 { > > + compatible = "fsl,imx8ulp-usb", "fsl,imx7ulp-usb", "fsl,imx6ul-usb"; > > + reg = <0x29900000 0x200>; > > + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&pcc4 IMX8ULP_CLK_USB0>; > > + power-domains = <&scmi_devpd IMX8ULP_PD_USB0>; > > + phys = <&usbphy1>; > > + fsl,usbmisc = <&usbmisc1 0>; > > + ahb-burst-config = <0x0>; > > + tx-burst-size-dword = <0x8>; > > + rx-burst-size-dword = <0x8>; > > + status = "disabled"; > > + }; > > + > > + usbmisc1: usbmisc@29900200 { > > + compatible = "fsl,imx8ulp-usbmisc", "fsl,imx7d-usbmisc", > > + "fsl,imx6q-usbmisc"; > > + #index-cells = <1>; > > + reg = <0x29900200 0x200>; > > Could you move 'reg' above so that it's after compatible? Okay. > > > + status = "disabled"; > > + }; > > + > > + usbphy1: usb-phy@29910000 { > > + compatible = "fsl,imx8ulp-usbphy", "fsl,imx7ulp-usbphy"; > > + reg = <0x29910000 0x10000>; > > + interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&pcc4 IMX8ULP_CLK_USB0_PHY>; > > + #phy-cells = <0>; > > + status = "disabled"; > > + }; > > + > > + usbotg2: usb@29920000 { > > + compatible = "fsl,imx8ulp-usb", "fsl,imx7ulp-usb", "fsl,imx6ul-usb"; > > + reg = <0x29920000 0x200>; > > + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&pcc4 IMX8ULP_CLK_USB1>; > > + power-domains = <&scmi_devpd IMX8ULP_PD_USDHC2_USB1>; > > + phys = <&usbphy2>; > > + fsl,usbmisc = <&usbmisc2 0>; > > + ahb-burst-config = <0x0>; > > + tx-burst-size-dword = <0x8>; > > + rx-burst-size-dword = <0x8>; > > + status = "disabled"; > > + }; > > + > > + usbmisc2: usbmisc@29920200 { > > + compatible = "fsl,imx8ulp-usbmisc", "fsl,imx7d-usbmisc", > > + "fsl,imx6q-usbmisc"; > > + #index-cells = <1>; > > + reg = <0x29920200 0x200>; > > Ditto Okay. Thanks, Xu Yang > > Shawn > > > + status = "disabled"; > > + }; > > + > > + usbphy2: usb-phy@29930000 { > > + compatible = "fsl,imx8ulp-usbphy", "fsl,imx7ulp-usbphy"; > > + reg = <0x29930000 0x10000>; > > + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&pcc4 IMX8ULP_CLK_USB1_PHY>; > > + #phy-cells = <0>; > > + status = "disabled"; > > + }; > > + > > fec: ethernet@29950000 { > > compatible = "fsl,imx8ulp-fec", "fsl,imx6ul-fec", "fsl,imx6q-fec"; > > reg = <0x29950000 0x10000>; > > -- > > 2.34.1 > >
diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi index c4a0082f30d3..7da9461a5745 100644 --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi @@ -472,6 +472,68 @@ usdhc2: mmc@298f0000 { status = "disabled"; }; + usbotg1: usb@29900000 { + compatible = "fsl,imx8ulp-usb", "fsl,imx7ulp-usb", "fsl,imx6ul-usb"; + reg = <0x29900000 0x200>; + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pcc4 IMX8ULP_CLK_USB0>; + power-domains = <&scmi_devpd IMX8ULP_PD_USB0>; + phys = <&usbphy1>; + fsl,usbmisc = <&usbmisc1 0>; + ahb-burst-config = <0x0>; + tx-burst-size-dword = <0x8>; + rx-burst-size-dword = <0x8>; + status = "disabled"; + }; + + usbmisc1: usbmisc@29900200 { + compatible = "fsl,imx8ulp-usbmisc", "fsl,imx7d-usbmisc", + "fsl,imx6q-usbmisc"; + #index-cells = <1>; + reg = <0x29900200 0x200>; + status = "disabled"; + }; + + usbphy1: usb-phy@29910000 { + compatible = "fsl,imx8ulp-usbphy", "fsl,imx7ulp-usbphy"; + reg = <0x29910000 0x10000>; + interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pcc4 IMX8ULP_CLK_USB0_PHY>; + #phy-cells = <0>; + status = "disabled"; + }; + + usbotg2: usb@29920000 { + compatible = "fsl,imx8ulp-usb", "fsl,imx7ulp-usb", "fsl,imx6ul-usb"; + reg = <0x29920000 0x200>; + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pcc4 IMX8ULP_CLK_USB1>; + power-domains = <&scmi_devpd IMX8ULP_PD_USDHC2_USB1>; + phys = <&usbphy2>; + fsl,usbmisc = <&usbmisc2 0>; + ahb-burst-config = <0x0>; + tx-burst-size-dword = <0x8>; + rx-burst-size-dword = <0x8>; + status = "disabled"; + }; + + usbmisc2: usbmisc@29920200 { + compatible = "fsl,imx8ulp-usbmisc", "fsl,imx7d-usbmisc", + "fsl,imx6q-usbmisc"; + #index-cells = <1>; + reg = <0x29920200 0x200>; + status = "disabled"; + }; + + usbphy2: usb-phy@29930000 { + compatible = "fsl,imx8ulp-usbphy", "fsl,imx7ulp-usbphy"; + reg = <0x29930000 0x10000>; + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pcc4 IMX8ULP_CLK_USB1_PHY>; + #phy-cells = <0>; + status = "disabled"; + }; + fec: ethernet@29950000 { compatible = "fsl,imx8ulp-fec", "fsl,imx6ul-fec", "fsl,imx6q-fec"; reg = <0x29950000 0x10000>;
Add USB nodes on i.MX8ULP platform which has 2 USB controllers. Signed-off-by: Xu Yang <xu.yang_2@nxp.com> --- Changes in v2: - no changes Changes in v3: - no changes Changes in v4: - no changes Changes in v5: - no changes Changes in v6: - drop usbphy aliases Changes in v7: - no changes Changes in v8: - no changes Changes in v9: - no changes Changes in v10: - no changes --- arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 62 ++++++++++++++++++++++ 1 file changed, 62 insertions(+)