diff mbox series

[2/3] KVM: arm64: Don't pass a TLBI level hint when zapping table entries

Message ID 20240325185158.8565-3-will@kernel.org (mailing list archive)
State New, archived
Headers show
Series KVM: arm64: TLBI fixes for the pgtable code | expand

Commit Message

Will Deacon March 25, 2024, 6:51 p.m. UTC
The TLBI level hints are for leaf entries only, so take care not to pass
them incorrectly after clearing a table entry.

Cc: Gavin Shan <gshan@redhat.com>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Quentin Perret <qperret@google.com>
Fixes: 82bb02445de5 ("KVM: arm64: Implement kvm_pgtable_hyp_unmap() at EL2")
Fixes: 6d9d2115c480 ("KVM: arm64: Add support for stage-2 map()/unmap() in generic page-table")
Signed-off-by: Will Deacon <will@kernel.org>
---
 arch/arm64/kvm/hyp/pgtable.c | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

Comments

Oliver Upton March 26, 2024, 8:37 a.m. UTC | #1
On Mon, Mar 25, 2024 at 06:51:57PM +0000, Will Deacon wrote:
> The TLBI level hints are for leaf entries only, so take care not to pass
> them incorrectly after clearing a table entry.
> 
> Cc: Gavin Shan <gshan@redhat.com>
> Cc: Marc Zyngier <maz@kernel.org>
> Cc: Quentin Perret <qperret@google.com>
> Fixes: 82bb02445de5 ("KVM: arm64: Implement kvm_pgtable_hyp_unmap() at EL2")
> Fixes: 6d9d2115c480 ("KVM: arm64: Add support for stage-2 map()/unmap() in generic page-table")
> Signed-off-by: Will Deacon <will@kernel.org>
> ---
>  arch/arm64/kvm/hyp/pgtable.c | 12 +++++++-----
>  1 file changed, 7 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c
> index de0b667ba296..a40dafc43bb6 100644
> --- a/arch/arm64/kvm/hyp/pgtable.c
> +++ b/arch/arm64/kvm/hyp/pgtable.c
> @@ -528,7 +528,7 @@ static int hyp_unmap_walker(const struct kvm_pgtable_visit_ctx *ctx,
>  
>  		kvm_clear_pte(ctx->ptep);
>  		dsb(ishst);
> -		__tlbi_level(vae2is, __TLBI_VADDR(ctx->addr, 0), ctx->level);
> +		__tlbi_level(vae2is, __TLBI_VADDR(ctx->addr, 0), TLBI_TTL_UNKNOWN);
>  	} else {
>  		if (ctx->end - ctx->addr < granule)
>  			return -EINVAL;
> @@ -896,10 +896,12 @@ static void stage2_unmap_put_pte(const struct kvm_pgtable_visit_ctx *ctx,
>  	if (kvm_pte_valid(ctx->old)) {
>  		kvm_clear_pte(ctx->ptep);
>  
> -		if (!stage2_unmap_defer_tlb_flush(pgt) ||
> -		    kvm_pte_table(ctx->old, ctx->level)) {
> -			kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, mmu,
> -					ctx->addr, ctx->level);
> +		if (kvm_pte_table(ctx->old, ctx->level)) {
> +			kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, mmu, ctx->addr,
> +				     TLBI_TTL_UNKNOWN);

Ah, here it is! Can you add this invalidation to patch #1? Otherwise the
fix will intermediately introduce another bug, AFAICT.

Rest of the diff looks good.
Will Deacon March 26, 2024, 9:34 a.m. UTC | #2
On Tue, Mar 26, 2024 at 01:37:43AM -0700, Oliver Upton wrote:
> On Mon, Mar 25, 2024 at 06:51:57PM +0000, Will Deacon wrote:
> > The TLBI level hints are for leaf entries only, so take care not to pass
> > them incorrectly after clearing a table entry.
> > 
> > Cc: Gavin Shan <gshan@redhat.com>
> > Cc: Marc Zyngier <maz@kernel.org>
> > Cc: Quentin Perret <qperret@google.com>
> > Fixes: 82bb02445de5 ("KVM: arm64: Implement kvm_pgtable_hyp_unmap() at EL2")
> > Fixes: 6d9d2115c480 ("KVM: arm64: Add support for stage-2 map()/unmap() in generic page-table")
> > Signed-off-by: Will Deacon <will@kernel.org>
> > ---
> >  arch/arm64/kvm/hyp/pgtable.c | 12 +++++++-----
> >  1 file changed, 7 insertions(+), 5 deletions(-)
> > 
> > diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c
> > index de0b667ba296..a40dafc43bb6 100644
> > --- a/arch/arm64/kvm/hyp/pgtable.c
> > +++ b/arch/arm64/kvm/hyp/pgtable.c
> > @@ -528,7 +528,7 @@ static int hyp_unmap_walker(const struct kvm_pgtable_visit_ctx *ctx,
> >  
> >  		kvm_clear_pte(ctx->ptep);
> >  		dsb(ishst);
> > -		__tlbi_level(vae2is, __TLBI_VADDR(ctx->addr, 0), ctx->level);
> > +		__tlbi_level(vae2is, __TLBI_VADDR(ctx->addr, 0), TLBI_TTL_UNKNOWN);
> >  	} else {
> >  		if (ctx->end - ctx->addr < granule)
> >  			return -EINVAL;
> > @@ -896,10 +896,12 @@ static void stage2_unmap_put_pte(const struct kvm_pgtable_visit_ctx *ctx,
> >  	if (kvm_pte_valid(ctx->old)) {
> >  		kvm_clear_pte(ctx->ptep);
> >  
> > -		if (!stage2_unmap_defer_tlb_flush(pgt) ||
> > -		    kvm_pte_table(ctx->old, ctx->level)) {
> > -			kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, mmu,
> > -					ctx->addr, ctx->level);
> > +		if (kvm_pte_table(ctx->old, ctx->level)) {
> > +			kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, mmu, ctx->addr,
> > +				     TLBI_TTL_UNKNOWN);
> 
> Ah, here it is! Can you add this invalidation to patch #1? Otherwise the
> fix will intermediately introduce another bug, AFAICT.

Heh, well I'd argue that bug already exists in the case that TLB
invalidation isn't deferred, so that's why I kept them separate.

But happy to fold in if you prefer. Main thing is to get it fixed!

Will
Oliver Upton March 26, 2024, 1:12 p.m. UTC | #3
On Tue, Mar 26, 2024 at 09:34:16AM +0000, Will Deacon wrote:
> On Tue, Mar 26, 2024 at 01:37:43AM -0700, Oliver Upton wrote:
> > On Mon, Mar 25, 2024 at 06:51:57PM +0000, Will Deacon wrote:
> > > The TLBI level hints are for leaf entries only, so take care not to pass
> > > them incorrectly after clearing a table entry.
> > > 
> > > Cc: Gavin Shan <gshan@redhat.com>
> > > Cc: Marc Zyngier <maz@kernel.org>
> > > Cc: Quentin Perret <qperret@google.com>
> > > Fixes: 82bb02445de5 ("KVM: arm64: Implement kvm_pgtable_hyp_unmap() at EL2")
> > > Fixes: 6d9d2115c480 ("KVM: arm64: Add support for stage-2 map()/unmap() in generic page-table")
> > > Signed-off-by: Will Deacon <will@kernel.org>
> > > ---
> > >  arch/arm64/kvm/hyp/pgtable.c | 12 +++++++-----
> > >  1 file changed, 7 insertions(+), 5 deletions(-)
> > > 
> > > diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c
> > > index de0b667ba296..a40dafc43bb6 100644
> > > --- a/arch/arm64/kvm/hyp/pgtable.c
> > > +++ b/arch/arm64/kvm/hyp/pgtable.c
> > > @@ -528,7 +528,7 @@ static int hyp_unmap_walker(const struct kvm_pgtable_visit_ctx *ctx,
> > >  
> > >  		kvm_clear_pte(ctx->ptep);
> > >  		dsb(ishst);
> > > -		__tlbi_level(vae2is, __TLBI_VADDR(ctx->addr, 0), ctx->level);
> > > +		__tlbi_level(vae2is, __TLBI_VADDR(ctx->addr, 0), TLBI_TTL_UNKNOWN);
> > >  	} else {
> > >  		if (ctx->end - ctx->addr < granule)
> > >  			return -EINVAL;
> > > @@ -896,10 +896,12 @@ static void stage2_unmap_put_pte(const struct kvm_pgtable_visit_ctx *ctx,
> > >  	if (kvm_pte_valid(ctx->old)) {
> > >  		kvm_clear_pte(ctx->ptep);
> > >  
> > > -		if (!stage2_unmap_defer_tlb_flush(pgt) ||
> > > -		    kvm_pte_table(ctx->old, ctx->level)) {
> > > -			kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, mmu,
> > > -					ctx->addr, ctx->level);
> > > +		if (kvm_pte_table(ctx->old, ctx->level)) {
> > > +			kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, mmu, ctx->addr,
> > > +				     TLBI_TTL_UNKNOWN);
> > 
> > Ah, here it is! Can you add this invalidation to patch #1? Otherwise the
> > fix will intermediately introduce another bug, AFAICT.
> 
> Heh, well I'd argue that bug already exists in the case that TLB
> invalidation isn't deferred, so that's why I kept them separate.

Ah, that's fine, when I was looking at this earlier I thought this
patch was getting blamed on LPA2, although patch #1 needs to go a bit
further back.

I'm fine with this as is, but maybe add a blurb to the changelog hinting
that the level hint is BS but will be fixed in a future change.
diff mbox series

Patch

diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c
index de0b667ba296..a40dafc43bb6 100644
--- a/arch/arm64/kvm/hyp/pgtable.c
+++ b/arch/arm64/kvm/hyp/pgtable.c
@@ -528,7 +528,7 @@  static int hyp_unmap_walker(const struct kvm_pgtable_visit_ctx *ctx,
 
 		kvm_clear_pte(ctx->ptep);
 		dsb(ishst);
-		__tlbi_level(vae2is, __TLBI_VADDR(ctx->addr, 0), ctx->level);
+		__tlbi_level(vae2is, __TLBI_VADDR(ctx->addr, 0), TLBI_TTL_UNKNOWN);
 	} else {
 		if (ctx->end - ctx->addr < granule)
 			return -EINVAL;
@@ -896,10 +896,12 @@  static void stage2_unmap_put_pte(const struct kvm_pgtable_visit_ctx *ctx,
 	if (kvm_pte_valid(ctx->old)) {
 		kvm_clear_pte(ctx->ptep);
 
-		if (!stage2_unmap_defer_tlb_flush(pgt) ||
-		    kvm_pte_table(ctx->old, ctx->level)) {
-			kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, mmu,
-					ctx->addr, ctx->level);
+		if (kvm_pte_table(ctx->old, ctx->level)) {
+			kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, mmu, ctx->addr,
+				     TLBI_TTL_UNKNOWN);
+		} else if (!stage2_unmap_defer_tlb_flush(pgt)) {
+			kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, mmu, ctx->addr,
+				     ctx->level);
 		}
 	}