Message ID | 20240329044142.3095193-1-fshao@chromium.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v2] pmdomain: mediatek: Add MT8188 buck isolation setting | expand |
On Fri, 29 Mar 2024 at 05:43, Fei Shao <fshao@chromium.org> wrote: > > From: Johnson Wang <johnson.wang@mediatek.com> > > From: Johnson Wang <johnson.wang@mediatek.com> > > Add buck isolation setting to ADSP_AO, CAM_VCORE and IMG_VCORE power > domains in MT8188 for proper buck isolation control in power domain > on/off. > > Signed-off-by: Johnson Wang <johnson.wang@mediatek.com> > Signed-off-by: Fei Shao <fshao@chromium.org> > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Applied for next, thanks! Kind regards Uffe > --- > > Changes in v2: > [1] was reviewed but didn't get accepted at the time. > This rebases [1] on next-20240327 with revised commit message. > > [1]: https://lore.kernel.org/all/20230315114505.25144-1-johnson.wang@mediatek.com/ > > drivers/pmdomain/mediatek/mt8188-pm-domains.h | 14 +++++++++++--- > 1 file changed, 11 insertions(+), 3 deletions(-) > > diff --git a/drivers/pmdomain/mediatek/mt8188-pm-domains.h b/drivers/pmdomain/mediatek/mt8188-pm-domains.h > index 06834ab6597c..007235be9efe 100644 > --- a/drivers/pmdomain/mediatek/mt8188-pm-domains.h > +++ b/drivers/pmdomain/mediatek/mt8188-pm-domains.h > @@ -175,6 +175,8 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8188[] = { > .ctl_offs = 0x35C, > .pwr_sta_offs = 0x16C, > .pwr_sta2nd_offs = 0x170, > + .ext_buck_iso_offs = 0x3EC, > + .ext_buck_iso_mask = BIT(10), > .bp_cfg = { > BUS_PROT_WR(INFRA, > MT8188_TOP_AXI_PROT_EN_2_ADSP_AO_STEP1, > @@ -187,7 +189,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8188[] = { > MT8188_TOP_AXI_PROT_EN_2_CLR, > MT8188_TOP_AXI_PROT_EN_2_STA), > }, > - .caps = MTK_SCPD_ALWAYS_ON, > + .caps = MTK_SCPD_ALWAYS_ON | MTK_SCPD_EXT_BUCK_ISO, > }, > [MT8188_POWER_DOMAIN_ADSP_INFRA] = { > .name = "adsp_infra", > @@ -524,6 +526,8 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8188[] = { > .ctl_offs = 0x3A4, > .pwr_sta_offs = 0x16C, > .pwr_sta2nd_offs = 0x170, > + .ext_buck_iso_offs = 0x3EC, > + .ext_buck_iso_mask = BIT(12), > .bp_cfg = { > BUS_PROT_WR(INFRA, > MT8188_TOP_AXI_PROT_EN_MM_IMG_VCORE_STEP1, > @@ -541,7 +545,8 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8188[] = { > MT8188_TOP_AXI_PROT_EN_MM_2_CLR, > MT8188_TOP_AXI_PROT_EN_MM_2_STA), > }, > - .caps = MTK_SCPD_KEEP_DEFAULT_OFF | MTK_SCPD_DOMAIN_SUPPLY, > + .caps = MTK_SCPD_KEEP_DEFAULT_OFF | MTK_SCPD_DOMAIN_SUPPLY | > + MTK_SCPD_EXT_BUCK_ISO, > }, > [MT8188_POWER_DOMAIN_IMG_MAIN] = { > .name = "img_main", > @@ -591,6 +596,8 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8188[] = { > .ctl_offs = 0x3A0, > .pwr_sta_offs = 0x16C, > .pwr_sta2nd_offs = 0x170, > + .ext_buck_iso_offs = 0x3EC, > + .ext_buck_iso_mask = BIT(11), > .bp_cfg = { > BUS_PROT_WR(INFRA, > MT8188_TOP_AXI_PROT_EN_MM_CAM_VCORE_STEP1, > @@ -618,7 +625,8 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8188[] = { > MT8188_TOP_AXI_PROT_EN_MM_2_CLR, > MT8188_TOP_AXI_PROT_EN_MM_2_STA), > }, > - .caps = MTK_SCPD_KEEP_DEFAULT_OFF | MTK_SCPD_DOMAIN_SUPPLY, > + .caps = MTK_SCPD_KEEP_DEFAULT_OFF | MTK_SCPD_DOMAIN_SUPPLY | > + MTK_SCPD_EXT_BUCK_ISO, > }, > [MT8188_POWER_DOMAIN_CAM_MAIN] = { > .name = "cam_main", > -- > 2.44.0.478.gd926399ef9-goog >
diff --git a/drivers/pmdomain/mediatek/mt8188-pm-domains.h b/drivers/pmdomain/mediatek/mt8188-pm-domains.h index 06834ab6597c..007235be9efe 100644 --- a/drivers/pmdomain/mediatek/mt8188-pm-domains.h +++ b/drivers/pmdomain/mediatek/mt8188-pm-domains.h @@ -175,6 +175,8 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8188[] = { .ctl_offs = 0x35C, .pwr_sta_offs = 0x16C, .pwr_sta2nd_offs = 0x170, + .ext_buck_iso_offs = 0x3EC, + .ext_buck_iso_mask = BIT(10), .bp_cfg = { BUS_PROT_WR(INFRA, MT8188_TOP_AXI_PROT_EN_2_ADSP_AO_STEP1, @@ -187,7 +189,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8188[] = { MT8188_TOP_AXI_PROT_EN_2_CLR, MT8188_TOP_AXI_PROT_EN_2_STA), }, - .caps = MTK_SCPD_ALWAYS_ON, + .caps = MTK_SCPD_ALWAYS_ON | MTK_SCPD_EXT_BUCK_ISO, }, [MT8188_POWER_DOMAIN_ADSP_INFRA] = { .name = "adsp_infra", @@ -524,6 +526,8 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8188[] = { .ctl_offs = 0x3A4, .pwr_sta_offs = 0x16C, .pwr_sta2nd_offs = 0x170, + .ext_buck_iso_offs = 0x3EC, + .ext_buck_iso_mask = BIT(12), .bp_cfg = { BUS_PROT_WR(INFRA, MT8188_TOP_AXI_PROT_EN_MM_IMG_VCORE_STEP1, @@ -541,7 +545,8 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8188[] = { MT8188_TOP_AXI_PROT_EN_MM_2_CLR, MT8188_TOP_AXI_PROT_EN_MM_2_STA), }, - .caps = MTK_SCPD_KEEP_DEFAULT_OFF | MTK_SCPD_DOMAIN_SUPPLY, + .caps = MTK_SCPD_KEEP_DEFAULT_OFF | MTK_SCPD_DOMAIN_SUPPLY | + MTK_SCPD_EXT_BUCK_ISO, }, [MT8188_POWER_DOMAIN_IMG_MAIN] = { .name = "img_main", @@ -591,6 +596,8 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8188[] = { .ctl_offs = 0x3A0, .pwr_sta_offs = 0x16C, .pwr_sta2nd_offs = 0x170, + .ext_buck_iso_offs = 0x3EC, + .ext_buck_iso_mask = BIT(11), .bp_cfg = { BUS_PROT_WR(INFRA, MT8188_TOP_AXI_PROT_EN_MM_CAM_VCORE_STEP1, @@ -618,7 +625,8 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8188[] = { MT8188_TOP_AXI_PROT_EN_MM_2_CLR, MT8188_TOP_AXI_PROT_EN_MM_2_STA), }, - .caps = MTK_SCPD_KEEP_DEFAULT_OFF | MTK_SCPD_DOMAIN_SUPPLY, + .caps = MTK_SCPD_KEEP_DEFAULT_OFF | MTK_SCPD_DOMAIN_SUPPLY | + MTK_SCPD_EXT_BUCK_ISO, }, [MT8188_POWER_DOMAIN_CAM_MAIN] = { .name = "cam_main",