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h=From:To:Subject:Date:Message-ID:MIME-Version:Content-Type:From; b=n75yb7nRtRwdTAS4wjIRKlbscogi02NEL+0ey+lQnVTTtp+mOcfI6HrJoGn8lHuN2 A6YTD4LlJN8gBo18oOk8l+1ShZ+WMF4e2E2PwasVdNXcyNn3fS9Ildt3OhoJ990rkK b4LlXrrGUxkyBj6llNF85gYS8YCdE0847XOfAjPs6DmOgAzlM1w1A741E2A1yPyKKv 4hKrdy9Ptcm28W5Y8OGQHNRU27BO8FKvCjhlHwqbnByq3myO4eK3g/n8bvCXZeCUHa F/jr/rjzAbpXaBqaoMb1DBETLarMCkSG5+4QdGI71xh5Ru9NiZfzWoSHNDaBQY9956 /2LSX6gzbqK0Q== From: Dmitry Rokosov To: , , , , , , , CC: , , , , , , , Dmitry Rokosov Subject: [PATCH v1 4/4] arm64: dts: amlogic: a1: setup CPU power management Date: Sat, 30 Mar 2024 00:04:42 +0300 Message-ID: <20240329210453.27530-5-ddrokosov@salutedevices.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240329210453.27530-1-ddrokosov@salutedevices.com> References: <20240329210453.27530-1-ddrokosov@salutedevices.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org MIME-Version: 1.0 X-ClientProxiedBy: p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 184500 [Mar 29 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: ddrokosov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 14 0.3.14 5a0c43d8a1c3c0e5b0916cc02a90d4b950c01f96, {Tracking_from_domain_doesnt_match_to}, 100.64.160.123:7.1.2;127.0.0.199:7.1.2;d41d8cd98f00b204e9800998ecf8427e.com:7.1.1;salutedevices.com:7.1.1;smtp.sberdevices.ru:7.1.1,5.0.1, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean X-KSMG-LinksScanning: Clean X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/03/29 16:52:00 #24511844 X-KSMG-AntiVirus-Status: Clean, skipped X-EXCLAIMER-MD-CONFIG: 2c86f778-e09b-4440-8b15-867914633a10 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240331_091137_423962_B01D6EE6 X-CRM114-Status: GOOD ( 13.61 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The Amlogic A1 SoC family utilizes static operating points and a PWM-controlled core voltage regulator, which is specific to the board. As the main CPU clock input, the SoC uses CLKID_CPU_CLK from the CPU clock controller, which can be inherited from the system PLL (syspll) or a fixed CPU clock. Currently, the stable operating points at all frequencies are set to 800mV. This value is obtained from the vendor setup of several A1 boards. Signed-off-by: Dmitry Rokosov --- arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 44 +++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi index 0de809f4d42c..c57c7c1cd5f8 100644 --- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi @@ -33,6 +33,13 @@ cpu0: cpu@0 { reg = <0x0 0x0>; enable-method = "psci"; next-level-cache = <&l2>; + clocks = <&clkc_cpu CLKID_CPU_CLK>; + clock-names = "core_clk"; + operating-points-v2 = <&cpu_opp_table0>; + voltage-tolerance = <0>; + clock-latency = <50000>; + capacity-dmips-mhz = <400>; + dynamic-power-coefficient = <80>; #cooling-cells = <2>; }; @@ -42,6 +49,13 @@ cpu1: cpu@1 { reg = <0x0 0x1>; enable-method = "psci"; next-level-cache = <&l2>; + clocks = <&clkc_cpu CLKID_CPU_CLK>; + clock-names = "core_clk"; + operating-points-v2 = <&cpu_opp_table0>; + voltage-tolerance = <0>; + clock-latency = <50000>; + capacity-dmips-mhz = <400>; + dynamic-power-coefficient = <80>; #cooling-cells = <2>; }; @@ -52,6 +66,36 @@ l2: l2-cache0 { }; }; + cpu_opp_table0: cpu_opp_table0 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <128000000>; + opp-microvolt = <800000>; + }; + opp01 { + opp-hz = /bits/ 64 <256000000>; + opp-microvolt = <800000>; + }; + opp02 { + opp-hz = /bits/ 64 <512000000>; + opp-microvolt = <800000>; + }; + opp03 { + opp-hz = /bits/ 64 <768000000>; + opp-microvolt = <800000>; + }; + opp04 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <800000>; + }; + opp05 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <800000>; + }; + }; + efuse: efuse { compatible = "amlogic,meson-gxbb-efuse"; clocks = <&clkc_periphs CLKID_OTP>;