| Message ID | 20240405080008.1225223-2-anshuman.khandual@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64/hw_breakpoint: Enable FEAT_Debugv8p9 | expand |
On Fri, Apr 05, 2024 at 01:30:01PM +0530, Anshuman Khandual wrote: > This adds register fields for MDSELR_EL1 as per the definitions based > on DDI0601 2023-12. Reviewed-by: Mark Brown <broonie@kernel.org> against DDI0601 2024-03. > +Sysreg MDSELR_EL1 2 0 0 4 2 > +Res0 63:6 > +Enum 5:4 BANK > + 0b00 BANK_0 > + 0b01 BANK_1 > + 0b10 BANK_2 > + 0b11 BANK_3 > +EndEnum I think this is a reasonable translation of the values for BANK.
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index a4c1dd4741a4..4c58fd7a70e6 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -93,6 +93,17 @@ Res0 63:32 Field 31:0 DTRTX EndSysreg +Sysreg MDSELR_EL1 2 0 0 4 2 +Res0 63:6 +Enum 5:4 BANK + 0b00 BANK_0 + 0b01 BANK_1 + 0b10 BANK_2 + 0b11 BANK_3 +EndEnum +Res0 3:0 +EndSysreg + Sysreg OSECCR_EL1 2 0 0 6 2 Res0 63:32 Field 31:0 EDECCR
This adds register fields for MDSELR_EL1 as per the definitions based on DDI0601 2023-12. Cc: Will Deacon <will@kernel.org> Cc: Mark Brown <broonie@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> --- arch/arm64/tools/sysreg | 11 +++++++++++ 1 file changed, 11 insertions(+)