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[91.118.163.37]) by smtp.gmail.com with ESMTPSA id qw6-20020a1709066a0600b00a52172808c9sm279884ejc.56.2024.04.10.08.55.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Apr 2024 08:55:47 -0700 (PDT) From: Javier Carrasco Date: Wed, 10 Apr 2024 17:55:34 +0200 Subject: [PATCH v2 2/4] dt-bindings: rtc: lpc32xx-rtc: convert to dtschema MIME-Version: 1.0 Message-Id: <20240410-rtc_dtschema-v2-2-d32a11ab0745@gmail.com> References: <20240410-rtc_dtschema-v2-0-d32a11ab0745@gmail.com> In-Reply-To: <20240410-rtc_dtschema-v2-0-d32a11ab0745@gmail.com> To: Alexandre Belloni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jiaxun Yang , Vladimir Zapolskiy , Joel Stanley , Andrew Jeffery , Maxime Coquelin , Alexandre Torgue Cc: linux-rtc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-stm32@st-md-mailman.stormreply.com, Javier Carrasco X-Mailer: b4 0.14-dev X-Developer-Signature: v=1; a=ed25519-sha256; t=1712764543; l=2099; i=javier.carrasco.cruz@gmail.com; s=20240312; h=from:subject:message-id; bh=ZJ06gPeNSTQ2DySuOzdESjyZIxHEy/NT6VtQopAeiQc=; b=OWv7GNhwJh5KCDkRW7ERfspAklaTpWgWcxbYfHhi4SlqF6l+Dk6ATof15wOpkwnTCDEg8Vawt 6TzRRYUgVEgA0j8sdfATE22NOBeslYc9HH6g4bJakYvCUttKWqZHKL9 X-Developer-Key: i=javier.carrasco.cruz@gmail.com; a=ed25519; pk=lzSIvIzMz0JhJrzLXI0HAdPwsNPSSmEn6RbS+PTS9aQ= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240410_085557_267355_80CC9B35 X-CRM114-Status: GOOD ( 13.92 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Convert existing binding to dtschema to support validation. Add the undocumented 'clocks' property. Signed-off-by: Javier Carrasco Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/rtc/lpc32xx-rtc.txt | 15 -------- .../devicetree/bindings/rtc/nxp,lpc32xx-rtc.yaml | 41 ++++++++++++++++++++++ 2 files changed, 41 insertions(+), 15 deletions(-) diff --git a/Documentation/devicetree/bindings/rtc/lpc32xx-rtc.txt b/Documentation/devicetree/bindings/rtc/lpc32xx-rtc.txt deleted file mode 100644 index a87a1e9bc060..000000000000 --- a/Documentation/devicetree/bindings/rtc/lpc32xx-rtc.txt +++ /dev/null @@ -1,15 +0,0 @@ -* NXP LPC32xx SoC Real Time Clock controller - -Required properties: -- compatible: must be "nxp,lpc3220-rtc" -- reg: physical base address of the controller and length of memory mapped - region. -- interrupts: The RTC interrupt - -Example: - - rtc@40024000 { - compatible = "nxp,lpc3220-rtc"; - reg = <0x40024000 0x1000>; - interrupts = <52 0>; - }; diff --git a/Documentation/devicetree/bindings/rtc/nxp,lpc32xx-rtc.yaml b/Documentation/devicetree/bindings/rtc/nxp,lpc32xx-rtc.yaml new file mode 100644 index 000000000000..62ddeef961e9 --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/nxp,lpc32xx-rtc.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/nxp,lpc32xx-rtc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP LPC32xx SoC Real Time Clock + +maintainers: + - Javier Carrasco + +allOf: + - $ref: rtc.yaml# + +properties: + compatible: + const: nxp,lpc3220-rtc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +unevaluatedProperties: false + +examples: + - | + rtc@40024000 { + compatible = "nxp,lpc3220-rtc"; + reg = <0x40024000 0x1000>; + interrupts = <52 0>; + };